From mboxrd@z Thu Jan 1 00:00:00 1970 Received: (from majordomo@localhost) by pauillac.inria.fr (8.7.6/8.7.3) id UAA04214; Fri, 1 Jun 2001 20:36:10 +0200 (MET DST) X-Authentication-Warning: pauillac.inria.fr: majordomo set sender to owner-caml-list@pauillac.inria.fr using -f Received: from concorde.inria.fr (concorde.inria.fr [192.93.2.39]) by pauillac.inria.fr (8.7.6/8.7.3) with ESMTP id UAA04216 for ; Fri, 1 Jun 2001 20:36:09 +0200 (MET DST) Received: from blount.mail.mindspring.net (blount.mail.mindspring.net [207.69.200.226]) by concorde.inria.fr (8.11.1/8.10.0) with ESMTP id f51Ia8102709 for ; Fri, 1 Jun 2001 20:36:08 +0200 (MET DST) Received: from dylan (1Cust167.tnt8.tucson.az.da.uu.net [63.15.233.167]) by blount.mail.mindspring.net (8.9.3/8.8.5) with SMTP id OAA18219 for ; Fri, 1 Jun 2001 14:36:06 -0400 (EDT) Message-ID: <003001c0eaca$01e48220$210148bf@dylan> From: "David McClain" To: Subject: [Caml-list] OCaml Speed for Block Convolutions Date: Fri, 1 Jun 2001 11:38:08 -0700 MIME-Version: 1.0 Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: 7bit X-Priority: 3 X-MSMail-Priority: Normal X-Mailer: Microsoft Outlook Express 5.00.2919.6600 X-MimeOLE: Produced By Microsoft MimeOLE V5.00.2919.6600 Sender: owner-caml-list@pauillac.inria.fr Precedence: bulk Hi, I just wanted to let everyone know that I have been doing some OCaml modeling of signal processing chains. One of these is block convolution processing using overlap-add of huge signal streams (GByte in length). While this was only a modeling attempt I was amazed to find that the code is able to keep up in realtime with stereo processing at 16 KHz sample rates on a cheapo 500 MHz Pentium III running Win/98SE 256 MB RAM, with lots of disk activity. The speed is so good here that I am reluctant to recode this whole thing into C for what I believe will be only a 20-30% speedup. The OCaml array handling mechanism is very fast indeed. I have run into problems with address space limitations given a 32-bit architecture and a roughly 21 bit limit on maximum index of normal (double-precision) arrays. When are we going to have readily available 64-bit architectures!? - D.McClain, Sr. Scientist, Raytheon Systems Co., Tucson, AZ ------------------- To unsubscribe, mail caml-list-request@inria.fr. Archives: http://caml.inria.fr