From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail2-relais-roc.national.inria.fr (mail2-relais-roc.national.inria.fr [192.134.164.83]) by walapai.inria.fr (8.13.6/8.13.6) with ESMTP id p2UJOToc029995 for ; Wed, 30 Mar 2011 21:24:29 +0200 X-IronPort-Anti-Spam-Filtered: true X-IronPort-Anti-Spam-Result: AvsEADmCk01QRFuw/2dsb2JhbAClVne+eoVqBA X-IronPort-AV: E=Sophos;i="4.63,269,1299452400"; d="scan'208";a="95415482" Received: from furbychan.cocan.org ([80.68.91.176]) by mail2-smtp-roc.national.inria.fr with ESMTP/TLS/AES256-SHA; 30 Mar 2011 21:24:24 +0200 Received: from rich by furbychan.cocan.org with local (Exim 4.72) (envelope-from ) id 1Q510B-0001Bb-PH; Wed, 30 Mar 2011 20:24:23 +0100 Date: Wed, 30 Mar 2011 20:24:23 +0100 From: "Richard W.M. Jones" To: Jon Harrop Cc: caml-list@inria.fr Message-ID: <20110330192423.GB23513@annexia.org> References: <4D8C73C8.6020801@inescporto.pt> <1301055903.8429.314.camel@thinkpad> <341494683.237537.1301057887481.JavaMail.root@zmbs4.inria.fr> <4D8C944A.9060601@inria.fr> <4D8CB859.9040709@inescporto.pt> <4D8CDDCC.4010000@ens-lyon.org> <4D8CEAA4.2030403@inescporto.pt> <1301084818.8429.435.camel@thinkpad> <20110326103149.GA7467@annexia.org> <040801cbeefb$68cd5440$3a67fcc0$@ffconsultancy.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <040801cbeefb$68cd5440$3a67fcc0$@ffconsultancy.com> User-Agent: Mutt/1.5.18 (2008-05-17) Subject: Re: [Caml-list] Efficient OCaml multicore -- roadmap? On Wed, Mar 30, 2011 at 05:56:25PM +0100, Jon Harrop wrote: > Richard Jones wrote: > > The sort of high end hardware we're seeing now has 128 cores and hundreds > of > > gigabytes or even a terabyte of non-uniform RAM. > > FWIW, Azul have been shipping 864-core machines for years now. > Note also that they use a single multi-threaded GC for the JVM to > write efficient parallel code (albeit with some hardware support) > and not separate GCs with message passing (which is basically > unheard of). That's great, but Azul are selling specialized Java hardware and I was talking about x86, Intel, AMD, HyperTransport, QuickPath and so on. My point (about x86 hardware) wasn't that message passing was necessary or the right or only way to do it in software. It was that message passing happens at the hardware level and that the programmer needs to understand that to write efficient software. Of course with a lot of hard work you can write multithreaded garbage collectors, apps etc which don't do bad stuff on NUMA. Rich. -- Richard Jones Red Hat