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From: "Richard W.M. Jones" <rich@annexia.org>
To: Goswin von Brederlow <goswin-v-b@web.de>
Cc: caml-list@inria.fr
Subject: Re: [Caml-list] Zarith problems on ppc64le
Date: Tue, 8 Nov 2016 11:10:26 +0000	[thread overview]
Message-ID: <20161108111026.GV324@annexia.org> (raw)
In-Reply-To: <20161108100029.GB18517@frosties>

[-- Attachment #1: Type: text/plain, Size: 628 bytes --]

On Tue, Nov 08, 2016 at 11:00:29AM +0100, Goswin von Brederlow wrote:
> What I don't get is why this ihappens only on ppc64le. For it to
> consistently return 0 there has to be some check in there for negative
> values. But that check is only present in some specialized ppc64le
> code? Seems like something the generic code for all archs should
> already have.
> 
> Just out of interest: So what's so special about ppc64le that checking
> for negatives is present just there?

Undefined behaviour means anything could happen.  Attached are the
ppc64 & ppc64le disassemblies for this function if you want to have a
look.

Rich.

[-- Attachment #2: ppc64.S --]
[-- Type: text/plain, Size: 13495 bytes --]

0000000000001220 <.ml_z_of_float>:
    1220:	7c 08 02 a6 	mflr    r0
    1224:	fb 61 ff d0 	std     r27,-48(r1)
    1228:	fb e1 ff f0 	std     r31,-16(r1)
    122c:	7c 7b 1b 78 	mr      r27,r3
    1230:	db e1 ff f8 	stfd    f31,-8(r1)
    1234:	fb 41 ff c8 	std     r26,-56(r1)
    1238:	3f e2 00 00 	addis   r31,r2,0
    123c:	eb ff 00 00 	ld      r31,0(r31)
    1240:	3c a2 00 00 	addis   r5,r2,0
    1244:	38 80 00 01 	li      r4,1
    1248:	fb 81 ff d8 	std     r28,-40(r1)
    124c:	fb a1 ff e0 	std     r29,-32(r1)
    1250:	38 a5 00 00 	addi    r5,r5,0
    1254:	fb c1 ff e8 	std     r30,-24(r1)
    1258:	f8 01 00 10 	std     r0,16(r1)
    125c:	f8 21 ff 41 	stdu    r1,-192(r1)
    1260:	cb e3 00 00 	lfd     f31,0(r3)
    1264:	e8 7f 00 00 	ld      r3,0(r31)
    1268:	fc 20 f8 90 	fmr     f1,f31
    126c:	db e1 00 78 	stfd    f31,120(r1)
    1270:	60 42 00 00 	ori     r2,r2,0
    1274:	e8 c1 00 78 	ld      r6,120(r1)
    1278:	48 00 00 01 	bl      1278 <.ml_z_of_float+0x58>
    127c:	60 00 00 00 	nop
    1280:	e8 df 00 00 	ld      r6,0(r31)
    1284:	3c 62 00 00 	addis   r3,r2,0
    1288:	38 a0 00 03 	li      r5,3
    128c:	38 80 00 01 	li      r4,1
    1290:	38 63 00 00 	addi    r3,r3,0
    1294:	48 00 00 01 	bl      1294 <.ml_z_of_float+0x74>
    1298:	60 00 00 00 	nop
    129c:	3c e0 3f ff 	lis     r7,16383
    12a0:	3c c0 c0 00 	lis     r6,-16384
    12a4:	e8 7f 00 00 	ld      r3,0(r31)
    12a8:	60 e7 ff ff 	ori     r7,r7,65535
    12ac:	78 c6 07 c6 	rldicr  r6,r6,32,31
    12b0:	78 e7 07 c6 	rldicr  r7,r7,32,31
    12b4:	3c a2 00 00 	addis   r5,r2,0
    12b8:	64 e7 ff ff 	oris    r7,r7,65535
    12bc:	60 c6 10 00 	ori     r6,r6,4096
    12c0:	60 e7 f0 00 	ori     r7,r7,61440
    12c4:	38 a5 00 00 	addi    r5,r5,0
    12c8:	38 80 00 01 	li      r4,1
    12cc:	48 00 00 01 	bl      12cc <.ml_z_of_float+0xac>
    12d0:	60 00 00 00 	nop
    12d4:	3d 22 00 00 	addis   r9,r2,0
    12d8:	c8 09 00 00 	lfd     f0,0(r9)
    12dc:	ff 9f 00 00 	fcmpu   cr7,f31,f0
    12e0:	4f dd f3 82 	cror    4*cr7+eq,4*cr7+gt,4*cr7+eq
    12e4:	41 9e 02 5c 	beq     cr7,1540 <.ml_z_of_float+0x320>
    12e8:	fc 00 fe 5e 	fctidz  f0,f31
    12ec:	d8 01 00 70 	stfd    f0,112(r1)
    12f0:	60 42 00 00 	ori     r2,r2,0
    12f4:	eb c1 00 70 	ld      r30,112(r1)
    12f8:	7b dc 0f a4 	rldicr  r28,r30,1,62
    12fc:	e8 7f 00 00 	ld      r3,0(r31)
    1300:	3c a2 00 00 	addis   r5,r2,0
    1304:	3b bc 00 01 	addi    r29,r28,1
    1308:	38 a5 00 00 	addi    r5,r5,0
    130c:	38 80 00 01 	li      r4,1
    1310:	7f a6 eb 78 	mr      r6,r29
    1314:	48 00 00 01 	bl      1314 <.ml_z_of_float+0xf4>
    1318:	60 00 00 00 	nop
    131c:	e8 7f 00 00 	ld      r3,0(r31)
    1320:	3c a2 00 00 	addis   r5,r2,0
    1324:	7f c6 f3 78 	mr      r6,r30
    1328:	38 a5 00 00 	addi    r5,r5,0
    132c:	38 80 00 01 	li      r4,1
    1330:	48 00 00 01 	bl      1330 <.ml_z_of_float+0x110>
    1334:	60 00 00 00 	nop
    1338:	e8 7f 00 00 	ld      r3,0(r31)
    133c:	3c a2 00 00 	addis   r5,r2,0
    1340:	38 80 00 01 	li      r4,1
    1344:	38 a5 00 00 	addi    r5,r5,0
    1348:	38 c0 00 00 	li      r6,0
    134c:	48 00 00 01 	bl      134c <.ml_z_of_float+0x12c>
    1350:	60 00 00 00 	nop
    1354:	e8 7f 00 00 	ld      r3,0(r31)
    1358:	3c a2 00 00 	addis   r5,r2,0
    135c:	38 80 00 01 	li      r4,1
    1360:	38 a5 00 00 	addi    r5,r5,0
    1364:	7f c6 f3 78 	mr      r6,r30
    1368:	48 00 00 01 	bl      1368 <.ml_z_of_float+0x148>
    136c:	60 00 00 00 	nop
    1370:	3d 22 00 00 	addis   r9,r2,0
    1374:	3c a2 00 00 	addis   r5,r2,0
    1378:	e8 7f 00 00 	ld      r3,0(r31)
    137c:	38 a5 00 00 	addi    r5,r5,0
    1380:	38 80 00 01 	li      r4,1
    1384:	c8 09 00 00 	lfd     f0,0(r9)
    1388:	ff 9f 00 00 	fcmpu   cr7,f31,f0
    138c:	41 9e 01 14 	beq     cr7,14a0 <.ml_z_of_float+0x280>
    1390:	3c c2 00 00 	addis   r6,r2,0
    1394:	38 c6 00 00 	addi    r6,r6,0
    1398:	48 00 00 01 	bl      1398 <.ml_z_of_float+0x178>
    139c:	60 00 00 00 	nop
    13a0:	e8 7f 00 00 	ld      r3,0(r31)
    13a4:	3c a2 00 00 	addis   r5,r2,0
    13a8:	7f 86 e3 78 	mr      r6,r28
    13ac:	38 a5 00 00 	addi    r5,r5,0
    13b0:	38 80 00 01 	li      r4,1
    13b4:	48 00 00 01 	bl      13b4 <.ml_z_of_float+0x194>
    13b8:	60 00 00 00 	nop
    13bc:	e8 7f 00 00 	ld      r3,0(r31)
    13c0:	3c a2 00 00 	addis   r5,r2,0
    13c4:	7f 86 e3 78 	mr      r6,r28
    13c8:	38 a5 00 00 	addi    r5,r5,0
    13cc:	38 80 00 01 	li      r4,1
    13d0:	48 00 00 01 	bl      13d0 <.ml_z_of_float+0x1b0>
    13d4:	60 00 00 00 	nop
    13d8:	e8 7f 00 00 	ld      r3,0(r31)
    13dc:	3c a2 00 00 	addis   r5,r2,0
    13e0:	7f a6 eb 78 	mr      r6,r29
    13e4:	38 a5 00 00 	addi    r5,r5,0
    13e8:	38 80 00 01 	li      r4,1
    13ec:	48 00 00 01 	bl      13ec <.ml_z_of_float+0x1cc>
    13f0:	60 00 00 00 	nop
    13f4:	3d 22 00 00 	addis   r9,r2,0
    13f8:	c8 09 00 00 	lfd     f0,0(r9)
    13fc:	ff 9f 00 00 	fcmpu   cr7,f31,f0
    1400:	4f dd f3 82 	cror    4*cr7+eq,4*cr7+gt,4*cr7+eq
    1404:	41 9e 02 c8 	beq     cr7,16cc <.ml_z_of_float+0x4ac>
    1408:	e9 3b 00 00 	ld      r9,0(r27)
    140c:	79 28 65 60 	rldicl  r8,r9,12,53
    1410:	39 48 fc 01 	addi    r10,r8,-1023
    1414:	2f 8a 00 00 	cmpwi   cr7,r10,0
    1418:	41 9c 02 4c 	blt     cr7,1664 <.ml_z_of_float+0x444>
    141c:	2f 8a 04 00 	cmpwi   cr7,r10,1024
    1420:	41 de 03 00 	beq-    cr7,1720 <.ml_z_of_float+0x500>
    1424:	2f 8a 00 34 	cmpwi   cr7,r10,52
    1428:	3f c0 00 10 	lis     r30,16
    142c:	79 29 03 00 	clrldi  r9,r9,12
    1430:	7b de 07 c6 	rldicr  r30,r30,32,31
    1434:	7d 3e f3 78 	or      r30,r9,r30
    1438:	41 9d 01 38 	bgt     cr7,1570 <.ml_z_of_float+0x350>
    143c:	3d 22 00 00 	addis   r9,r2,0
    1440:	21 4a 00 34 	subfic  r10,r10,52
    1444:	7f de 56 34 	srad    r30,r30,r10
    1448:	c8 09 00 00 	lfd     f0,0(r9)
    144c:	7b dd 0f a4 	rldicr  r29,r30,1,62
    1450:	3b bd 00 01 	addi    r29,r29,1
    1454:	ff 9f 00 00 	fcmpu   cr7,f31,f0
    1458:	4f dd f3 82 	cror    4*cr7+eq,4*cr7+gt,4*cr7+eq
    145c:	41 9e 00 a8 	beq     cr7,1504 <.ml_z_of_float+0x2e4>
    1460:	38 21 00 c0 	addi    r1,r1,192
    1464:	7b de 0f a4 	rldicr  r30,r30,1,62
    1468:	23 be 00 01 	subfic  r29,r30,1
    146c:	e8 01 00 10 	ld      r0,16(r1)
    1470:	cb e1 ff f8 	lfd     f31,-8(r1)
    1474:	7f a3 eb 78 	mr      r3,r29
    1478:	eb 41 ff c8 	ld      r26,-56(r1)
    147c:	eb 61 ff d0 	ld      r27,-48(r1)
    1480:	eb 81 ff d8 	ld      r28,-40(r1)
    1484:	eb a1 ff e0 	ld      r29,-32(r1)
    1488:	eb c1 ff e8 	ld      r30,-24(r1)
    148c:	eb e1 ff f0 	ld      r31,-16(r1)
    1490:	7c 08 03 a6 	mtlr    r0
    1494:	4e 80 00 20 	blr
    1498:	60 00 00 00 	nop
    149c:	60 00 00 00 	nop
    14a0:	3c c2 00 00 	addis   r6,r2,0
    14a4:	38 c6 00 00 	addi    r6,r6,0
    14a8:	48 00 00 01 	bl      14a8 <.ml_z_of_float+0x288>
    14ac:	60 00 00 00 	nop
    14b0:	e8 7f 00 00 	ld      r3,0(r31)
    14b4:	3c a2 00 00 	addis   r5,r2,0
    14b8:	7f 86 e3 78 	mr      r6,r28
    14bc:	38 a5 00 00 	addi    r5,r5,0
    14c0:	38 80 00 01 	li      r4,1
    14c4:	48 00 00 01 	bl      14c4 <.ml_z_of_float+0x2a4>
    14c8:	60 00 00 00 	nop
    14cc:	e8 7f 00 00 	ld      r3,0(r31)
    14d0:	3c a2 00 00 	addis   r5,r2,0
    14d4:	7f 86 e3 78 	mr      r6,r28
    14d8:	38 a5 00 00 	addi    r5,r5,0
    14dc:	38 80 00 01 	li      r4,1
    14e0:	48 00 00 01 	bl      14e0 <.ml_z_of_float+0x2c0>
    14e4:	60 00 00 00 	nop
    14e8:	e8 7f 00 00 	ld      r3,0(r31)
    14ec:	3c a2 00 00 	addis   r5,r2,0
    14f0:	7f a6 eb 78 	mr      r6,r29
    14f4:	38 a5 00 00 	addi    r5,r5,0
    14f8:	38 80 00 01 	li      r4,1
    14fc:	48 00 00 01 	bl      14fc <.ml_z_of_float+0x2dc>
    1500:	60 00 00 00 	nop
    1504:	38 21 00 c0 	addi    r1,r1,192
    1508:	7f a3 eb 78 	mr      r3,r29
    150c:	e8 01 00 10 	ld      r0,16(r1)
    1510:	cb e1 ff f8 	lfd     f31,-8(r1)
    1514:	eb 41 ff c8 	ld      r26,-56(r1)
    1518:	eb 61 ff d0 	ld      r27,-48(r1)
    151c:	eb 81 ff d8 	ld      r28,-40(r1)
    1520:	eb a1 ff e0 	ld      r29,-32(r1)
    1524:	eb c1 ff e8 	ld      r30,-24(r1)
    1528:	eb e1 ff f0 	ld      r31,-16(r1)
    152c:	7c 08 03 a6 	mtlr    r0
    1530:	4e 80 00 20 	blr
    1534:	60 00 00 00 	nop
    1538:	60 00 00 00 	nop
    153c:	60 00 00 00 	nop
    1540:	fc 1f 00 28 	fsub    f0,f31,f0
    1544:	39 20 ff ff 	li      r9,-1
    1548:	79 29 00 04 	rldicr  r9,r9,0,0
    154c:	fc 00 06 5e 	fctidz  f0,f0
    1550:	d8 01 00 70 	stfd    f0,112(r1)
    1554:	60 42 00 00 	ori     r2,r2,0
    1558:	eb c1 00 70 	ld      r30,112(r1)
    155c:	7f de 4a 78 	xor     r30,r30,r9
    1560:	4b ff fd 98 	b       12f8 <.ml_z_of_float+0xd8>
    1564:	60 00 00 00 	nop
    1568:	60 00 00 00 	nop
    156c:	60 00 00 00 	nop
    1570:	39 08 fb cd 	addi    r8,r8,-1075
    1574:	3c 62 00 00 	addis   r3,r2,0
    1578:	e8 63 00 00 	ld      r3,0(r3)
    157c:	38 c0 00 01 	li      r6,1
    1580:	7d 1f 07 b4 	extsw   r31,r8
    1584:	38 a0 00 00 	li      r5,0
    1588:	7f ff 36 74 	sradi   r31,r31,6
    158c:	79 1d 06 a0 	clrldi  r29,r8,58
    1590:	38 9f 00 03 	addi    r4,r31,3
    1594:	7b fb 1f 24 	rldicr  r27,r31,3,60
    1598:	7c 84 07 b4 	extsw   r4,r4
    159c:	7f ba 07 b4 	extsw   r26,r29
    15a0:	78 84 1f 24 	rldicr  r4,r4,3,60
    15a4:	48 00 00 01 	bl      15a4 <.ml_z_of_float+0x384>
    15a8:	60 00 00 00 	nop
    15ac:	2f 9f 00 00 	cmpwi   cr7,r31,0
    15b0:	7c 7c 1b 78 	mr      r28,r3
    15b4:	40 9d 00 18 	ble     cr7,15cc <.ml_z_of_float+0x3ac>
    15b8:	7f 65 db 78 	mr      r5,r27
    15bc:	38 80 00 00 	li      r4,0
    15c0:	38 63 00 10 	addi    r3,r3,16
    15c4:	48 00 00 01 	bl      15c4 <.ml_z_of_float+0x3a4>
    15c8:	60 00 00 00 	nop
    15cc:	2f ba 00 00 	cmpdi   cr7,r26,0
    15d0:	7c bb e2 14 	add     r5,r27,r28
    15d4:	7f c9 e8 36 	sld     r9,r30,r29
    15d8:	39 40 00 00 	li      r10,0
    15dc:	f9 25 00 10 	std     r9,16(r5)
    15e0:	41 9e 00 0c 	beq     cr7,15ec <.ml_z_of_float+0x3cc>
    15e4:	23 bd 00 40 	subfic  r29,r29,64
    15e8:	7f ca ee 34 	srad    r10,r30,r29
    15ec:	3d 22 00 00 	addis   r9,r2,0
    15f0:	f9 45 00 18 	std     r10,24(r5)
    15f4:	38 e0 00 00 	li      r7,0
    15f8:	c8 09 00 00 	lfd     f0,0(r9)
    15fc:	39 3f 00 02 	addi    r9,r31,2
    1600:	7d 29 07 b4 	extsw   r9,r9
    1604:	7d 28 4b 78 	mr      r8,r9
    1608:	ff 9f 00 00 	fcmpu   cr7,f31,f0
    160c:	4f dd f3 82 	cror    4*cr7+eq,4*cr7+gt,4*cr7+eq
    1610:	40 9e 00 b0 	bne     cr7,16c0 <.ml_z_of_float+0x4a0>
    1614:	2f a9 00 00 	cmpdi   cr7,r9,0
    1618:	40 9d 00 d8 	ble     cr7,16f0 <.ml_z_of_float+0x4d0>
    161c:	79 2a 1f 24 	rldicr  r10,r9,3,60
    1620:	7d 4a e2 14 	add     r10,r10,r28
    1624:	e9 4a 00 08 	ld      r10,8(r10)
    1628:	2f aa 00 00 	cmpdi   cr7,r10,0
    162c:	40 9e 00 74 	bne     cr7,16a0 <.ml_z_of_float+0x480>
    1630:	7d 29 03 a6 	mtctr   r9
    1634:	79 2a 1f 24 	rldicr  r10,r9,3,60
    1638:	39 4a 00 08 	addi    r10,r10,8
    163c:	7d 4a e2 14 	add     r10,r10,r28
    1640:	48 00 00 1c 	b       165c <.ml_z_of_float+0x43c>
    1644:	60 00 00 00 	nop
    1648:	60 00 00 00 	nop
    164c:	60 00 00 00 	nop
    1650:	e9 2a ff f9 	ldu     r9,-8(r10)
    1654:	2f a9 00 00 	cmpdi   cr7,r9,0
    1658:	40 9e 00 48 	bne     cr7,16a0 <.ml_z_of_float+0x480>
    165c:	39 08 ff ff 	addi    r8,r8,-1
    1660:	42 00 ff f0 	bdnz    1650 <.ml_z_of_float+0x430>
    1664:	38 21 00 c0 	addi    r1,r1,192
    1668:	3b a0 00 01 	li      r29,1
    166c:	7f a3 eb 78 	mr      r3,r29
    1670:	e8 01 00 10 	ld      r0,16(r1)
    1674:	cb e1 ff f8 	lfd     f31,-8(r1)
    1678:	eb 41 ff c8 	ld      r26,-56(r1)
    167c:	eb 61 ff d0 	ld      r27,-48(r1)
    1680:	eb 81 ff d8 	ld      r28,-40(r1)
    1684:	eb a1 ff e0 	ld      r29,-32(r1)
    1688:	eb c1 ff e8 	ld      r30,-24(r1)
    168c:	eb e1 ff f0 	ld      r31,-16(r1)
    1690:	7c 08 03 a6 	mtlr    r0
    1694:	4e 80 00 20 	blr
    1698:	60 00 00 00 	nop
    169c:	60 00 00 00 	nop
    16a0:	2f a8 00 01 	cmpdi   cr7,r8,1
    16a4:	41 9e 00 50 	beq     cr7,16f4 <.ml_z_of_float+0x4d4>
    16a8:	7c e8 43 78 	or      r8,r7,r8
    16ac:	7f 9d e3 78 	mr      r29,r28
    16b0:	f9 1c 00 08 	std     r8,8(r28)
    16b4:	4b ff fe 50 	b       1504 <.ml_z_of_float+0x2e4>
    16b8:	60 00 00 00 	nop
    16bc:	60 00 00 00 	nop
    16c0:	38 e0 ff ff 	li      r7,-1
    16c4:	78 e7 00 04 	rldicr  r7,r7,0,0
    16c8:	4b ff ff 4c 	b       1614 <.ml_z_of_float+0x3f4>
    16cc:	3d 22 00 00 	addis   r9,r2,0
    16d0:	c8 09 00 00 	lfd     f0,0(r9)
    16d4:	ff 9f 00 00 	fcmpu   cr7,f31,f0
    16d8:	4f dc f3 82 	cror    4*cr7+eq,4*cr7+lt,4*cr7+eq
    16dc:	40 fe fd 2c 	bne+    cr7,1408 <.ml_z_of_float+0x1e8>
    16e0:	4b ff fe 24 	b       1504 <.ml_z_of_float+0x2e4>
    16e4:	60 00 00 00 	nop
    16e8:	60 00 00 00 	nop
    16ec:	60 00 00 00 	nop
    16f0:	41 de ff 74 	beq-    cr7,1664 <.ml_z_of_float+0x444>
    16f4:	e9 3c 00 10 	ld      r9,16(r28)
    16f8:	39 40 ff ff 	li      r10,-1
    16fc:	79 4a 00 80 	clrldi  r10,r10,2
    1700:	7f a9 50 40 	cmpld   cr7,r9,r10
    1704:	41 9d ff a4 	bgt     cr7,16a8 <.ml_z_of_float+0x488>
    1708:	2f a7 00 00 	cmpdi   cr7,r7,0
    170c:	79 29 0f a4 	rldicr  r9,r9,1,62
    1710:	23 a9 00 01 	subfic  r29,r9,1
    1714:	40 9e fd f0 	bne     cr7,1504 <.ml_z_of_float+0x2e4>
    1718:	3b a9 00 01 	addi    r29,r9,1
    171c:	4b ff fd e8 	b       1504 <.ml_z_of_float+0x2e4>
    1720:	48 00 00 01 	bl      1720 <.ml_z_of_float+0x500>
    1724:	00 00 00 00 	.long 0x0
    1728:	00 00 02 01 	.long 0x201
    172c:	81 06 00 00 	lwz     r8,0(r6)

[-- Attachment #3: ppc64le.S --]
[-- Type: text/plain, Size: 8093 bytes --]

00000000000015a0 <ml_z_of_float>:
    15a0:	00 00 4c 3c 	addis   r2,r12,0
    15a4:	00 00 42 38 	addi    r2,r2,0
    15a8:	a6 02 08 7c 	mflr    r0
    15ac:	f8 ff e1 db 	stfd    f31,-8(r1)
    15b0:	c8 ff 41 fb 	std     r26,-56(r1)
    15b4:	00 00 22 3d 	addis   r9,r2,0
    15b8:	d0 ff 61 fb 	std     r27,-48(r1)
    15bc:	d8 ff 81 fb 	std     r28,-40(r1)
    15c0:	e0 ff a1 fb 	std     r29,-32(r1)
    15c4:	e8 ff c1 fb 	std     r30,-24(r1)
    15c8:	f0 ff e1 fb 	std     r31,-16(r1)
    15cc:	00 00 09 c8 	lfd     f0,0(r9)
    15d0:	10 00 01 f8 	std     r0,16(r1)
    15d4:	61 ff 21 f8 	stdu    r1,-160(r1)
    15d8:	00 00 e3 cb 	lfd     f31,0(r3)
    15dc:	00 00 9f ff 	fcmpu   cr7,f31,f0
    15e0:	82 f3 dd 4f 	cror    4*cr7+eq,4*cr7+gt,4*cr7+eq
    15e4:	18 00 9e 40 	bne     cr7,15fc <ml_z_of_float+0x5c>
    15e8:	00 00 22 3d 	addis   r9,r2,0
    15ec:	00 00 09 c8 	lfd     f0,0(r9)
    15f0:	00 00 9f ff 	fcmpu   cr7,f31,f0
    15f4:	82 f3 dc 4f 	cror    4*cr7+eq,4*cr7+lt,4*cr7+eq
    15f8:	a8 01 9e 41 	beq     cr7,17a0 <ml_z_of_float+0x200>
    15fc:	66 00 e9 7f 	mfvsrd  r9,vs31
    1600:	60 65 28 79 	rldicl  r8,r9,12,53
    1604:	01 fc 48 39 	addi    r10,r8,-1023
    1608:	00 00 8a 2f 	cmpwi   cr7,r10,0
    160c:	58 01 9c 41 	blt     cr7,1764 <ml_z_of_float+0x1c4>
    1610:	00 04 8a 2f 	cmpwi   cr7,r10,1024
    1614:	6c 02 de 41 	beq-    cr7,1880 <ml_z_of_float+0x2e0>
    1618:	34 00 8a 2f 	cmpwi   cr7,r10,52
    161c:	10 00 c0 3f 	lis     r30,16
    1620:	00 03 29 79 	clrldi  r9,r9,12
    1624:	c6 07 de 7b 	rldicr  r30,r30,32,31
    1628:	78 f3 3e 7d 	or      r30,r9,r30
    162c:	54 00 9d 41 	bgt     cr7,1680 <ml_z_of_float+0xe0>
    1630:	d0 04 00 f0 	xxlxor  vs0,vs0,vs0
    1634:	34 00 4a 21 	subfic  r10,r10,52
    1638:	34 56 de 7f 	srad    r30,r30,r10
    163c:	00 00 9f ff 	fcmpu   cr7,f31,f0
    1640:	a4 0f c3 7b 	rldicr  r3,r30,1,62
    1644:	01 00 63 38 	addi    r3,r3,1
    1648:	82 f3 dd 4f 	cror    4*cr7+eq,4*cr7+gt,4*cr7+eq
    164c:	94 01 9e 40 	bne     cr7,17e0 <ml_z_of_float+0x240>
    1650:	a0 00 21 38 	addi    r1,r1,160
    1654:	10 00 01 e8 	ld      r0,16(r1)
    1658:	f8 ff e1 cb 	lfd     f31,-8(r1)
    165c:	c8 ff 41 eb 	ld      r26,-56(r1)
    1660:	d0 ff 61 eb 	ld      r27,-48(r1)
    1664:	d8 ff 81 eb 	ld      r28,-40(r1)
    1668:	e0 ff a1 eb 	ld      r29,-32(r1)
    166c:	e8 ff c1 eb 	ld      r30,-24(r1)
    1670:	f0 ff e1 eb 	ld      r31,-16(r1)
    1674:	a6 03 08 7c 	mtlr    r0
    1678:	20 00 80 4e 	blr
    167c:	00 00 42 60 	ori     r2,r2,0
    1680:	cd fb 08 39 	addi    r8,r8,-1075
    1684:	00 00 62 3c 	addis   r3,r2,0
    1688:	00 00 63 e8 	ld      r3,0(r3)
    168c:	01 00 c0 38 	li      r6,1
    1690:	b4 07 1f 7d 	extsw   r31,r8
    1694:	00 00 a0 38 	li      r5,0
    1698:	74 36 ff 7f 	sradi   r31,r31,6
    169c:	a0 06 1d 79 	clrldi  r29,r8,58
    16a0:	03 00 9f 38 	addi    r4,r31,3
    16a4:	24 1f fb 7b 	rldicr  r27,r31,3,60
    16a8:	b4 07 84 7c 	extsw   r4,r4
    16ac:	b4 07 ba 7f 	extsw   r26,r29
    16b0:	24 1f 84 78 	rldicr  r4,r4,3,60
    16b4:	01 00 00 48 	bl      16b4 <ml_z_of_float+0x114>
    16b8:	00 00 00 60 	nop
    16bc:	00 00 9f 2f 	cmpwi   cr7,r31,0
    16c0:	78 1b 7c 7c 	mr      r28,r3
    16c4:	18 00 9d 40 	ble     cr7,16dc <ml_z_of_float+0x13c>
    16c8:	78 db 65 7f 	mr      r5,r27
    16cc:	00 00 80 38 	li      r4,0
    16d0:	10 00 63 38 	addi    r3,r3,16
    16d4:	01 00 00 48 	bl      16d4 <ml_z_of_float+0x134>
    16d8:	00 00 00 60 	nop
    16dc:	00 00 ba 2f 	cmpdi   cr7,r26,0
    16e0:	14 e2 bb 7c 	add     r5,r27,r28
    16e4:	36 e8 c9 7f 	sld     r9,r30,r29
    16e8:	00 00 40 39 	li      r10,0
    16ec:	10 00 25 f9 	std     r9,16(r5)
    16f0:	0c 00 9e 41 	beq     cr7,16fc <ml_z_of_float+0x15c>
    16f4:	40 00 bd 23 	subfic  r29,r29,64
    16f8:	34 ee ca 7f 	srad    r10,r30,r29
    16fc:	d0 04 00 f0 	xxlxor  vs0,vs0,vs0
    1700:	02 00 3f 39 	addi    r9,r31,2
    1704:	18 00 45 f9 	std     r10,24(r5)
    1708:	00 00 e0 38 	li      r7,0
    170c:	b4 07 29 7d 	extsw   r9,r9
    1710:	00 00 9f ff 	fcmpu   cr7,f31,f0
    1714:	78 4b 28 7d 	mr      r8,r9
    1718:	82 f3 dd 4f 	cror    4*cr7+eq,4*cr7+gt,4*cr7+eq
    171c:	24 01 9e 40 	bne     cr7,1840 <ml_z_of_float+0x2a0>
    1720:	00 00 a9 2f 	cmpdi   cr7,r9,0
    1724:	28 01 9d 40 	ble     cr7,184c <ml_z_of_float+0x2ac>
    1728:	24 1f 2a 79 	rldicr  r10,r9,3,60
    172c:	14 e2 4a 7d 	add     r10,r10,r28
    1730:	08 00 4a e9 	ld      r10,8(r10)
    1734:	00 00 aa 2f 	cmpdi   cr7,r10,0
    1738:	e8 00 9e 40 	bne     cr7,1820 <ml_z_of_float+0x280>
    173c:	a6 03 29 7d 	mtctr   r9
    1740:	24 1f 2a 79 	rldicr  r10,r9,3,60
    1744:	08 00 4a 39 	addi    r10,r10,8
    1748:	14 e2 4a 7d 	add     r10,r10,r28
    174c:	10 00 00 48 	b       175c <ml_z_of_float+0x1bc>
    1750:	f9 ff 2a e9 	ldu     r9,-8(r10)
    1754:	00 00 a9 2f 	cmpdi   cr7,r9,0
    1758:	c8 00 9e 40 	bne     cr7,1820 <ml_z_of_float+0x280>
    175c:	ff ff 08 39 	addi    r8,r8,-1
    1760:	f0 ff 00 42 	bdnz    1750 <ml_z_of_float+0x1b0>
    1764:	a0 00 21 38 	addi    r1,r1,160
    1768:	01 00 60 38 	li      r3,1
    176c:	10 00 01 e8 	ld      r0,16(r1)
    1770:	f8 ff e1 cb 	lfd     f31,-8(r1)
    1774:	c8 ff 41 eb 	ld      r26,-56(r1)
    1778:	d0 ff 61 eb 	ld      r27,-48(r1)
    177c:	d8 ff 81 eb 	ld      r28,-40(r1)
    1780:	e0 ff a1 eb 	ld      r29,-32(r1)
    1784:	e8 ff c1 eb 	ld      r30,-24(r1)
    1788:	f0 ff e1 eb 	ld      r31,-16(r1)
    178c:	a6 03 08 7c 	mtlr    r0
    1790:	20 00 80 4e 	blr
    1794:	00 00 00 60 	nop
    1798:	00 00 00 60 	nop
    179c:	00 00 42 60 	ori     r2,r2,0
    17a0:	5e fe e0 ff 	fctidz  f31,f31
    17a4:	a0 00 21 38 	addi    r1,r1,160
    17a8:	10 00 01 e8 	ld      r0,16(r1)
    17ac:	c8 ff 41 eb 	ld      r26,-56(r1)
    17b0:	d0 ff 61 eb 	ld      r27,-48(r1)
    17b4:	d8 ff 81 eb 	ld      r28,-40(r1)
    17b8:	e0 ff a1 eb 	ld      r29,-32(r1)
    17bc:	e8 ff c1 eb 	ld      r30,-24(r1)
    17c0:	f0 ff e1 eb 	ld      r31,-16(r1)
    17c4:	a6 03 08 7c 	mtlr    r0
    17c8:	66 00 e3 7f 	mfvsrd  r3,vs31
    17cc:	f8 ff e1 cb 	lfd     f31,-8(r1)
    17d0:	a4 0f 63 78 	rldicr  r3,r3,1,62
    17d4:	01 00 63 38 	addi    r3,r3,1
    17d8:	20 00 80 4e 	blr
    17dc:	00 00 42 60 	ori     r2,r2,0
    17e0:	a0 00 21 38 	addi    r1,r1,160
    17e4:	a4 0f de 7b 	rldicr  r30,r30,1,62
    17e8:	01 00 7e 20 	subfic  r3,r30,1
    17ec:	10 00 01 e8 	ld      r0,16(r1)
    17f0:	f8 ff e1 cb 	lfd     f31,-8(r1)
    17f4:	c8 ff 41 eb 	ld      r26,-56(r1)
    17f8:	d0 ff 61 eb 	ld      r27,-48(r1)
    17fc:	d8 ff 81 eb 	ld      r28,-40(r1)
    1800:	e0 ff a1 eb 	ld      r29,-32(r1)
    1804:	e8 ff c1 eb 	ld      r30,-24(r1)
    1808:	f0 ff e1 eb 	ld      r31,-16(r1)
    180c:	a6 03 08 7c 	mtlr    r0
    1810:	20 00 80 4e 	blr
    1814:	00 00 00 60 	nop
    1818:	00 00 00 60 	nop
    181c:	00 00 42 60 	ori     r2,r2,0
    1820:	01 00 a8 2f 	cmpdi   cr7,r8,1
    1824:	2c 00 9e 41 	beq     cr7,1850 <ml_z_of_float+0x2b0>
    1828:	78 43 e8 7c 	or      r8,r7,r8
    182c:	78 e3 83 7f 	mr      r3,r28
    1830:	08 00 1c f9 	std     r8,8(r28)
    1834:	1c fe ff 4b 	b       1650 <ml_z_of_float+0xb0>
    1838:	00 00 00 60 	nop
    183c:	00 00 42 60 	ori     r2,r2,0
    1840:	ff ff e0 38 	li      r7,-1
    1844:	04 00 e7 78 	rldicr  r7,r7,0,0
    1848:	d8 fe ff 4b 	b       1720 <ml_z_of_float+0x180>
    184c:	18 ff de 41 	beq-    cr7,1764 <ml_z_of_float+0x1c4>
    1850:	10 00 3c e9 	ld      r9,16(r28)
    1854:	ff ff 40 39 	li      r10,-1
    1858:	80 00 4a 79 	clrldi  r10,r10,2
    185c:	40 50 a9 7f 	cmpld   cr7,r9,r10
    1860:	c8 ff 9d 41 	bgt     cr7,1828 <ml_z_of_float+0x288>
    1864:	00 00 a7 2f 	cmpdi   cr7,r7,0
    1868:	a4 0f 23 79 	rldicr  r3,r9,1,62
    186c:	0c 00 9e 41 	beq     cr7,1878 <ml_z_of_float+0x2d8>
    1870:	01 00 63 20 	subfic  r3,r3,1
    1874:	dc fd ff 4b 	b       1650 <ml_z_of_float+0xb0>
    1878:	01 00 63 38 	addi    r3,r3,1
    187c:	d4 fd ff 4b 	b       1650 <ml_z_of_float+0xb0>
    1880:	01 00 00 48 	bl      1880 <ml_z_of_float+0x2e0>
    1884:	00 00 00 00 	.long 0x0
    1888:	00 00 02 01 	.long 0x1020000
    188c:	81 06 00 00 	.long 0x681

      reply	other threads:[~2016-11-08 11:10 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-11-07 13:22 Richard W.M. Jones
2016-11-07 13:31 ` Nicolas Ojeda Bar
2016-11-07 13:55 ` Francois BERENGER
2016-11-07 14:11   ` Sylvain Le Gall
2016-11-07 14:59     ` Simon Cruanes
2016-11-15  9:11       ` Bernhard Schommer
2016-11-07 15:48 ` Richard W.M. Jones
2016-11-07 15:58   ` Xavier Leroy
2016-11-07 16:19     ` Richard W.M. Jones
2016-11-08 10:00   ` Goswin von Brederlow
2016-11-08 11:10     ` Richard W.M. Jones [this message]

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