From: Xavier Leroy <Xavier.Leroy@inria.fr>
To: caml-list@inria.fr
Subject: Re: [Caml-list] [IMPORTANT] Intel Skylake / Kaby Lake hardware bug affects OCaml programs
Date: Fri, 30 Jun 2017 19:03:21 +0200 [thread overview]
Message-ID: <2dc653a6-4b1c-c22a-dfc7-382b2508be03@inria.fr> (raw)
In-Reply-To: <49E937AA-CACC-4525-9AF2-113AB4B47B69@gmail.com>
On 06/30/2017 06:46 PM, Anton Bachin wrote:
> In what I’ve read about the bug, there is no requirement that two virtual cores be running OCaml code (or rather, the malfunctioning instruction sequence). Is that accurate?
That's my guess, too, based on Intel's cryptic description of the issue. ("Complex set of micro-architectural conditions", you don't say!) However, the two repro cases I worked with (the one from Ahrefs and the earlier one) were both of the "running several copies of an OCaml program in parallel" kind.
- Xavier Leroy
next prev parent reply other threads:[~2017-06-30 17:03 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-06-30 13:51 Xavier Leroy
2017-06-30 14:15 ` Xavier Leroy
2017-06-30 15:17 ` Gabriel Scherer
2017-06-30 15:31 ` Emilio Jesús Gallego Arias
2017-06-30 16:30 ` Julia Lawall
2017-06-30 16:46 ` Anton Bachin
2017-06-30 17:03 ` Xavier Leroy [this message]
2017-07-05 1:01 ` Johannes Kanig
2017-06-30 15:28 ` Mark Shinwell
2017-06-30 15:19 ` Maxime Dénès
2017-06-30 15:38 ` Anton Bachin
2017-07-21 13:00 ` David MENTRÉ
2017-07-22 7:27 ` Gabriel Scherer
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