* DSD 2006 - FINAL Call For Papers - 9th EUROMICRO CONFERENCE ON DIGITAL SYSTEM DESIGN
@ 2006-03-12 20:43 DSD 2006
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@@@@@@@@@@@@@@@@@@@@@ DSD 2006 CALL FOR PAPERS @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
DSD’2006
9th EUROMICRO CONFERENCE ON DIGITAL SYSTEM DESIGN
Architectures, Methods and Tools
Cavtat near Dubrovnik, Croatia
August 30th - September 1st, 2006
FINAL Call for Papers Distribution
@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
Important Dates:
Submission of papers: March 15th, 2006 (Final*)
Notification of acceptance: May 3rd, 2006
Deadline for final version: June 9th, 2006
* due to many requests from potential authors the submission deadline is
extended to March 15.
@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
The Program Committee will be grateful if the posters are distrubuted to other potential authors.
DSD 2006 POSTERS @ http://www.confman.org/dsd06/posters/DSD-2006-posterf.pdf
@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
Euromicro Conference on Digital System Design (DSD) addresses all aspects of
(embedded) digital and mixed hardware/software system engineering.
It is a discussion forum for researchers and engineers working on state-of-the
art investigations, development, and applications.
It focuses on advanced system, design, and design automation concepts,
paradigms, methods and tools, as well as, modern implementation technologies
that enable effective and efficient development of high-quality (embedded)
systems for important and demanding applications in fields such as (wireless)
communication and networking; measurement and instrumentation; health-care and
medicine; military, space, avionic and automotive systems; security; multi-media
and ambient intelligence.
The main areas of interest are the following:
T1: Systems-on-a-chip/in-a-package: generic system platforms and platform-based
design; network on chip; multi-processors; system on re-configurable chip;
system FPGAs and structured ASICs; rapid prototyping; asynchronous systems;
power, energy, timing, predictability and other quality issues; intellectual
property, virtual components and design reuse.
T2: Programmable/re-configurable architectures: processor, communication, memory
and software architectures with focus on application specific and/or embedded
computing, co-processors; processing arrays; programmable fabrics; embedded
software; arithmetic, logic and special-operator units.
T3: System, hardware and embedded software specification, modeling and
validation: design languages; functional, structural and parametric
specification and modeling; simulation, emulation, prototyping, and testing at
the system, register-transfer, logic and physical levels; co-simulation and co
verification.
T4: System, hardware and embedded software synthesis: system, hardware/software
and embedded software synthesis; behavioral, register-transfer, logic and
physical circuit synthesis; multi-objective optimization observing power,
performance, communication, interconnections, layout, technology, reliability,
robustness, security, testability and other issues; (dynamic) management of
computational resources, power, energy etc.; design environments for embedded
systems and re-configurable computing.
T5: Emerging technologies, system paradigms and design methodologies: optical,
bio, nano and quantum technologies and computing; self-organizing and self
adapting (wireless) systems; wireless sensor networks; ambient intelligence and
augmented reality; ubiquitous, wearable and implanted systems; deep sub-micron
design issues.
T6: Applications of (embedded) digital systems with emphasis on demanding and
new applications in fields such as: (wireless) communication and networking;
measurement and instrumentation; health-care and medicine; military, space,
avionic and automotive systems; security; multi-media, instrumentation and
ambient intelligence; health-care and medicine; military, space, avionic and
automotive systems; security; multi-media and ambient intelligence.
@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
Special Topics and Sessions:
ST1 (keynote): Design Methodology for Integrated Digital RF, Texsas Instruments
TITLE: "Reinventing Design Methodology for Integrated 'Digital RF'".
Dr. Roman Staszewski
Design Manager, DRP Design, WTBU
Texas Instruments
SUMMARY:
Both digital and RF/analog designers can claim they have proven and sufficient
design methodologies. The luxury of isolation let them perfect their own world
without any concern for the other. But, the world demands efficiency, the latest
technology for pennies. While tight integration of RF and digital in SOC is the
cost effective answer, it opens a design methodology Pandora Box. What
previously could be ignored, has to be considered. What was proven and
sufficient, may not work anymore. The resulting paradigm change affects all
aspects of the design process from system architecture to circuit design to
validation to test.
SS1: Resource-Aware Sensor Network Systems
SCOPE: The special session on “Resource-Aware Sensor Network Systems” addresses
concepts, implementations and applications of sensor network systems, as well
as, new architectural models and hardware solutions in the sensor network
domain. Papers on any of the following and re-lated topics will be considered
for the special session:
• Sensor network concepts and architectures
• Sensing, processing and communicating on a chip
• Low-power and low-energy computation and communication
• Communication-computation trade-offs
• Resource-aware SW/HW Co-design
• Position determination and synchronization in sensor networks
• Fault-tolerance, dependability and robustness
• Prototypes and applications
SESSION ORGANIZER:
M. Handy, University of Rostock (DE)- matthias.handy@uni-rostock.de
SPECIAL SESSION SS1 WEB PAGE:
http://www-md.e-technik.uni-rostock.de/ma/hm13/dsd06
@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
Special Session SS2: Low-Power and High-Performance Networks-on-Chip
SCOPE
Although this special session addresses all aspects related to concepts,
implementations and applications of networks-on-chip and related EDA tools, its
focus is on low-power and high-performance aspects. Papers on any of the
following and related topics will be considered for the special session:
• Network-on-Chip concepts and architectures
• Application-specific communication on a chip and network topology
• Routing schemes, switch concepts, layouts, and signal transmission
• Low-power, low-energy and high-performance computation and communication
• Communication/computation and energy/performance trade-offs
• Static power minimization and dynamic power management
• Data coding, error detection, fault-tolerance and robustness
• Prototypes and applications
Session Organizer:
C. Cornelius, University of Rostock (DE) - claas.cornelius@uni-rostock.de
Special Session web page:
http://www-md.e-technik.uni-rostock.de/ma/cc14/dsd06/
@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
Panel Sessions and Embedded Tutorials:
Proposals for panel sessions and embedded tutorials are especially welcome.
Please contact Program Chair (venki@dsdconf.org).
Submission of papers:
Regular Papers: Submissions can be made that describe innovative work in the
scope of the Conference, and especially, in any of the above main areas of
interest (please indicate the topic area). If you are submitting to a track
please indicate the track area on the paper as: SS1 or SS2. Prospective authors
are encouraged to submit their manuscripts for review electronically trough the
following web page (http://www.dsdconf.org/) or by sending the paper to the
Program Chair via email venki@dsdconf.org (only in the case of the web
access problem) before the deadline for submission. Each manuscript should
include the complete paper text, all illustrations, and references. The
manuscript should conform to the required format single-spaced, double column,
A4/US letter page size, 10-point size Times Roman font, up to 8 pages. In order
to conduct a blind review, no indication of the authors' names should appear in
the submitted manuscript.
Case Study and Application Papers: Submissions can be made which report on
state-of-the-art digital systems, design methods and/or tools, and (embedded)
applications. Papers discussing lessons learned from practical experience,
demanding or new applications, and experimental research are particularly
encouraged. Manuscripts may be submitted in the same way as regular papers.
The Program Committee will decide if papers will be accepted for a long
presentation (30 minutes), short presentation (15 minutes), or as a poster.
For long and short presentations, 8 pages will be assigned in the published
proceedings. A poster presentation will be assigned 4 pages. Papers
exceeding the page limit will be charged 50 Euro per page in excess. If the
paper is accepted, at least one of the authors must pre-register and pay the
conference fee before the deadline for submitting the camera-ready paper.
Otherwise the paper will not be published in the proceedings.
Check List:
Prospective authors should check that the following information are included
while submitting the paper(s) for refereeing purpose.
() The paper and its title page should not contain the name(s) of the author(s),
or their affiliation
() The first page of the paper should the following information
* Title of the paper
* Track Area
* Conference topic area (write the most appropriate topic area)
* Up to six keywords
@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
Steering Committee:
Chairman: Lech Józwiak, Eindhoven Univ. of Technology (NL)
Krzysztof Kuchcinski, Lund U. (SE)
Antonio Nunez, U. Las Palmas (ES)
Program Chair: Venki Muthukumar, UNLV, USA
Deputy Program Chair: H. Kubatova, Cz. TU. in Prague, (CZ)
Organizing General Chair: Prof. Ivica Crnkovic, U. Mälardalen (SE)
Organizing Local Chair: Dr. Zoran Kalafatic, U. of Zagreb, Croatia
Program Committee:
Visit http://www.dsdcong.org/ for a complete list of Program Committee Members.
Contact Information:
Program Chair: Dr Venki Muthukumar
Department of Electrical and Computer Engineering
University of Nevada Las Vegas
4505 Maryland Parkway, Box 4026
Las Vegas, NV 89154-4026, USA
Phone: +1 702 895 3566
Fax: +1 702 895 4075
email: venki@dsdconf.org
DSD’06 web page: http://www.dsdconf.org/
Euromicro web page: http://www.euromicro.org/
DSD web page: http://www2.ele.tue.nl/dsd/
@@@@@@@@@@@@@@@@@@@@@@@@@@@@@ END OF CFP @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
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* DSD 2006 - FINAL Call For Papers - 9th EUROMICRO CONFERENCE ON DIGITAL SYSTEM DESIGN
@ 2006-03-13 8:19 DSD 2006
0 siblings, 0 replies; 2+ messages in thread
From: DSD 2006 @ 2006-03-13 8:19 UTC (permalink / raw)
To: caml-list
Our apologies if this is a duplicate email.
@@@@@@@@@@@@@@@@@@@@@ DSD 2006 CALL FOR PAPERS @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
DSD’2006
9th EUROMICRO CONFERENCE ON DIGITAL SYSTEM DESIGN
Architectures, Methods and Tools
Cavtat near Dubrovnik, Croatia
August 30th - September 1st, 2006
FINAL Call for Papers Distribution
@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
Important Dates:
Submission of papers: March 15th, 2006 (Final*)
Notification of acceptance: May 3rd, 2006
Deadline for final version: June 9th, 2006
* due to many requests from potential authors the submission deadline is
extended to March 15.
@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
The Program Committee will be grateful if the posters are distrubuted to other potential authors.
DSD 2006 POSTERS @ http://www.confman.org/dsd06/posters/DSD-2006-posterf.pdf
@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
Euromicro Conference on Digital System Design (DSD) addresses all aspects of
(embedded) digital and mixed hardware/software system engineering.
It is a discussion forum for researchers and engineers working on state-of-the
art investigations, development, and applications.
It focuses on advanced system, design, and design automation concepts,
paradigms, methods and tools, as well as, modern implementation technologies
that enable effective and efficient development of high-quality (embedded)
systems for important and demanding applications in fields such as (wireless)
communication and networking; measurement and instrumentation; health-care and
medicine; military, space, avionic and automotive systems; security; multi-media
and ambient intelligence.
The main areas of interest are the following:
T1: Systems-on-a-chip/in-a-package: generic system platforms and platform-based
design; network on chip; multi-processors; system on re-configurable chip;
system FPGAs and structured ASICs; rapid prototyping; asynchronous systems;
power, energy, timing, predictability and other quality issues; intellectual
property, virtual components and design reuse.
T2: Programmable/re-configurable architectures: processor, communication, memory
and software architectures with focus on application specific and/or embedded
computing, co-processors; processing arrays; programmable fabrics; embedded
software; arithmetic, logic and special-operator units.
T3: System, hardware and embedded software specification, modeling and
validation: design languages; functional, structural and parametric
specification and modeling; simulation, emulation, prototyping, and testing at
the system, register-transfer, logic and physical levels; co-simulation and co
verification.
T4: System, hardware and embedded software synthesis: system, hardware/software
and embedded software synthesis; behavioral, register-transfer, logic and
physical circuit synthesis; multi-objective optimization observing power,
performance, communication, interconnections, layout, technology, reliability,
robustness, security, testability and other issues; (dynamic) management of
computational resources, power, energy etc.; design environments for embedded
systems and re-configurable computing.
T5: Emerging technologies, system paradigms and design methodologies: optical,
bio, nano and quantum technologies and computing; self-organizing and self
adapting (wireless) systems; wireless sensor networks; ambient intelligence and
augmented reality; ubiquitous, wearable and implanted systems; deep sub-micron
design issues.
T6: Applications of (embedded) digital systems with emphasis on demanding and
new applications in fields such as: (wireless) communication and networking;
measurement and instrumentation; health-care and medicine; military, space,
avionic and automotive systems; security; multi-media, instrumentation and
ambient intelligence; health-care and medicine; military, space, avionic and
automotive systems; security; multi-media and ambient intelligence.
@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
Special Topics and Sessions:
ST1 (keynote): Design Methodology for Integrated Digital RF, Texsas Instruments
TITLE: "Reinventing Design Methodology for Integrated 'Digital RF'".
Dr. Roman Staszewski
Design Manager, DRP Design, WTBU
Texas Instruments
SUMMARY:
Both digital and RF/analog designers can claim they have proven and sufficient
design methodologies. The luxury of isolation let them perfect their own world
without any concern for the other. But, the world demands efficiency, the latest
technology for pennies. While tight integration of RF and digital in SOC is the
cost effective answer, it opens a design methodology Pandora Box. What
previously could be ignored, has to be considered. What was proven and
sufficient, may not work anymore. The resulting paradigm change affects all
aspects of the design process from system architecture to circuit design to
validation to test.
SS1: Resource-Aware Sensor Network Systems
SCOPE: The special session on “Resource-Aware Sensor Network Systems” addresses
concepts, implementations and applications of sensor network systems, as well
as, new architectural models and hardware solutions in the sensor network
domain. Papers on any of the following and re-lated topics will be considered
for the special session:
• Sensor network concepts and architectures
• Sensing, processing and communicating on a chip
• Low-power and low-energy computation and communication
• Communication-computation trade-offs
• Resource-aware SW/HW Co-design
• Position determination and synchronization in sensor networks
• Fault-tolerance, dependability and robustness
• Prototypes and applications
SESSION ORGANIZER:
M. Handy, University of Rostock (DE)- matthias.handy@uni-rostock.de
SPECIAL SESSION SS1 WEB PAGE:
http://www-md.e-technik.uni-rostock.de/ma/hm13/dsd06
@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
Special Session SS2: Low-Power and High-Performance Networks-on-Chip
SCOPE
Although this special session addresses all aspects related to concepts,
implementations and applications of networks-on-chip and related EDA tools, its
focus is on low-power and high-performance aspects. Papers on any of the
following and related topics will be considered for the special session:
• Network-on-Chip concepts and architectures
• Application-specific communication on a chip and network topology
• Routing schemes, switch concepts, layouts, and signal transmission
• Low-power, low-energy and high-performance computation and communication
• Communication/computation and energy/performance trade-offs
• Static power minimization and dynamic power management
• Data coding, error detection, fault-tolerance and robustness
• Prototypes and applications
Session Organizer:
C. Cornelius, University of Rostock (DE) - claas.cornelius@uni-rostock.de
Special Session web page:
http://www-md.e-technik.uni-rostock.de/ma/cc14/dsd06/
@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
Panel Sessions and Embedded Tutorials:
Proposals for panel sessions and embedded tutorials are especially welcome.
Please contact Program Chair (venki@dsdconf.org).
Submission of papers:
Regular Papers: Submissions can be made that describe innovative work in the
scope of the Conference, and especially, in any of the above main areas of
interest (please indicate the topic area). If you are submitting to a track
please indicate the track area on the paper as: SS1 or SS2. Prospective authors
are encouraged to submit their manuscripts for review electronically trough the
following web page (http://www.dsdconf.org/) or by sending the paper to the
Program Chair via email venki@dsdconf.org (only in the case of the web
access problem) before the deadline for submission. Each manuscript should
include the complete paper text, all illustrations, and references. The
manuscript should conform to the required format single-spaced, double column,
A4/US letter page size, 10-point size Times Roman font, up to 8 pages. In order
to conduct a blind review, no indication of the authors' names should appear in
the submitted manuscript.
Case Study and Application Papers: Submissions can be made which report on
state-of-the-art digital systems, design methods and/or tools, and (embedded)
applications. Papers discussing lessons learned from practical experience,
demanding or new applications, and experimental research are particularly
encouraged. Manuscripts may be submitted in the same way as regular papers.
The Program Committee will decide if papers will be accepted for a long
presentation (30 minutes), short presentation (15 minutes), or as a poster.
For long and short presentations, 8 pages will be assigned in the published
proceedings. A poster presentation will be assigned 4 pages. Papers
exceeding the page limit will be charged 50 Euro per page in excess. If the
paper is accepted, at least one of the authors must pre-register and pay the
conference fee before the deadline for submitting the camera-ready paper.
Otherwise the paper will not be published in the proceedings.
Check List:
Prospective authors should check that the following information are included
while submitting the paper(s) for refereeing purpose.
() The paper and its title page should not contain the name(s) of the author(s),
or their affiliation
() The first page of the paper should the following information
* Title of the paper
* Track Area
* Conference topic area (write the most appropriate topic area)
* Up to six keywords
@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
Steering Committee:
Chairman: Lech Józwiak, Eindhoven Univ. of Technology (NL)
Krzysztof Kuchcinski, Lund U. (SE)
Antonio Nunez, U. Las Palmas (ES)
Program Chair: Venki Muthukumar, UNLV, USA
Deputy Program Chair: H. Kubatova, Cz. TU. in Prague, (CZ)
Organizing General Chair: Prof. Ivica Crnkovic, U. Mälardalen (SE)
Organizing Local Chair: Dr. Zoran Kalafatic, U. of Zagreb, Croatia
Program Committee:
Visit http://www.dsdcong.org/ for a complete list of Program Committee Members.
Contact Information:
Program Chair: Dr Venki Muthukumar
Department of Electrical and Computer Engineering
University of Nevada Las Vegas
4505 Maryland Parkway, Box 4026
Las Vegas, NV 89154-4026, USA
Phone: +1 702 895 3566
Fax: +1 702 895 4075
email: venki@dsdconf.org
DSD’06 web page: http://www.dsdconf.org/
Euromicro web page: http://www.euromicro.org/
DSD web page: http://www2.ele.tue.nl/dsd/
@@@@@@@@@@@@@@@@@@@@@@@@@@@@@ END OF CFP @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
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