From mboxrd@z Thu Jan 1 00:00:00 1970 Received: (from majordomo@localhost) by pauillac.inria.fr (8.7.6/8.7.3) id RAA01730; Thu, 12 Aug 2004 17:07:19 +0200 (MET DST) X-Authentication-Warning: pauillac.inria.fr: majordomo set sender to owner-caml-list@pauillac.inria.fr using -f Received: from concorde.inria.fr (concorde.inria.fr [192.93.2.39]) by pauillac.inria.fr (8.7.6/8.7.3) with ESMTP id RAA01458 for ; Thu, 12 Aug 2004 17:07:18 +0200 (MET DST) X-SPAM-Warning: Sending machine is listed in blackholes.five-ten-sg.com Received: from pierce.numericable.net (pierce.numericable.net [80.236.0.150]) by concorde.inria.fr (8.12.10/8.12.10) with ESMTP id i7CF7IRM010015 for ; Thu, 12 Aug 2004 17:07:18 +0200 Received: (qmail 4516 invoked from network); 12 Aug 2004 15:07:17 -0000 Received: from unknown (HELO laposte.net) ([81.220.100.229]) (envelope-sender ) by pierce.numericable.net (qmail-ldap-1.03) with SMTP for ; 12 Aug 2004 15:07:17 -0000 Message-ID: <411B884C.3020508@laposte.net> Date: Thu, 12 Aug 2004 17:10:04 +0200 From: =?ISO-8859-1?Q?Olivier_P=E9r=E8s?= User-Agent: Mozilla/5.0 (X11; U; Linux i686; en-US; rv:1.6) Gecko/20040206 X-Accept-Language: br, fr-fr, fr, en MIME-Version: 1.0 To: caml-list@inria.fr Subject: Re: [Caml-list] The tag bit References: In-Reply-To: Content-Type: text/plain; charset=us-ascii; format=flowed Content-Transfer-Encoding: 7bit X-Miltered: at concorde with ID 411B87A6.000 by Joe's j-chkmail (http://j-chkmail.ensmp.fr)! X-Loop: caml-list@inria.fr X-Spam: no; 0.00; caml-list:01 bauer:01 65.:99 olivier:02 olivier:02 address:96 wrote:03 registers:07 registers:07 naive:08 precious:91 memory:09 processors:09 whereas:10 msb:89 Sender: owner-caml-list@pauillac.inria.fr Precedence: bulk Bauer, Christoph wrote: > Of couse this is just a naive idea, but please tell me why ;-) Well, I can see several reasons : * processors like powers of two, especially when it comes to the size of a memory address, because of cache issues, so you'd better make it 32 or 64 words than 33 or 65. * If the tag bit can be anywhere in a word you have to spend extra time to extract it, whereas when it is at a fixed place, especially LSB or MSB, it is very cheap and easy. * You would need two registers to access a value and its tag instead of one, and registers are very precious, at least on IA-32 architectures. Olivier. ------------------- To unsubscribe, mail caml-list-request@inria.fr Archives: http://caml.inria.fr Bug reports: http://caml.inria.fr/bin/caml-bugs FAQ: http://caml.inria.fr/FAQ/ Beginner's list: http://groups.yahoo.com/group/ocaml_beginners