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From: Matteo Frigo <Matteo.Frigo@qrclab.com>
To: John Carr <jfc@MIT.EDU>
Cc: ygrek <ygrekheretix@gmail.com>,  caml-list@inria.fr
References: <20130424183543.e3a4290382f7f9ce7b522a57@gmail.com>
	<201304241557.r3OFvT9a012995@outgoing.mit.edu>
Date: Wed, 24 Apr 2013 13:35:22 -0400
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Subject: Re: [Caml-list] ackermann microbenchmark strange results

John Carr <jfc@MIT.EDU> writes:

> Try changing loop alignment by editing assembly code.  The address of
> ack is different in the different versions.  Modern Intel processors are
> sensitive to code alignment.  There is a limit on the number of branch
> prediction table entries per cache line.  An instruction that crosses a
> cache line boundary may be slower than an instruction within a cache
> line.  I am not surprised to see a 20% difference caused by an apparently
> irrelevant code change.

See also

    http://people.csail.mit.edu/nkushman/papers/ms-thesis.pdf

for a detailed analysis of a related problem on older (1998) hardware.