From mboxrd@z Thu Jan 1 00:00:00 1970 Received: (from majordomo@localhost) by pauillac.inria.fr (8.7.6/8.7.3) id SAA11224; Wed, 19 Feb 2003 18:36:02 +0100 (MET) X-Authentication-Warning: pauillac.inria.fr: majordomo set sender to owner-caml-list@pauillac.inria.fr using -f Received: from concorde.inria.fr (concorde.inria.fr [192.93.2.39]) by pauillac.inria.fr (8.7.6/8.7.3) with ESMTP id SAA11212 for ; Wed, 19 Feb 2003 18:36:01 +0100 (MET) Received: from epexch01.qlogic.org ([63.170.40.3]) by concorde.inria.fr (8.11.1/8.11.1) with ESMTP id h1JHa0T05367 for ; Wed, 19 Feb 2003 18:36:00 +0100 (MET) Received: from epmailtmp.qlogic.org ([10.20.33.254]) by epexch01.qlogic.org with Microsoft SMTPSVC(5.0.2195.5329); Wed, 19 Feb 2003 11:34:44 -0600 Received: from [10.20.33.146] ([10.20.33.146]) by epmailtmp.qlogic.org with Microsoft SMTPSVC(5.0.2195.4905); Wed, 19 Feb 2003 11:34:43 -0600 Date: Wed, 19 Feb 2003 11:45:52 -0600 (CST) From: Brian Hurt X-X-Sender: Reply-To: Brian Hurt To: cc: Subject: Re: [Caml-list] Re: feature priorities (multithreading) In-Reply-To: <20030219171419.95167.qmail@web13808.mail.yahoo.com> Message-ID: MIME-Version: 1.0 Content-Type: TEXT/PLAIN; charset=US-ASCII X-OriginalArrivalTime: 19 Feb 2003 17:34:43.0839 (UTC) FILETIME=[308480F0:01C2D83D] Sender: owner-caml-list@pauillac.inria.fr Precedence: bulk On Wed, 19 Feb 2003, Ranjan Bagchi wrote: > I've been reading LtU lately (lambda.weblogs.com) and > came across this paper: > http://www.sics.se/~joe/apachevsyaws.html detailing a > high-performance web-server written in Erlang. > > One point here is that the threads in Erlang uses a > ton of "microthreads" which don't use OS Threads at > all (and don't incur the overhead). Stackless python > (www.stackless.com) does this too, and is able to > support massive concurrency. Yep. These are called "userspace" or "green" threads. They're fairly easy to do- all you have to do is swap stacks. Some experimentation on my part showed that on a P4, you could task switch between two such user space threads in 30-60 clock cycles on the x86- less expensive than a cache miss. User space threads have some problems. First off, they don't take advantage of multiple CPUs, or SMT CPUs. Second, and more importantly, if one thread blocks- either by doing blocking I/O, or page faulting- all threads block. A better approach is what's called the M-by-N approach. You have M kernel level threads (so you can take advantage of M parallel CPUs) each executing threads from a pool of N user space threads. This gives you the best of both worlds. Brian ------------------- To unsubscribe, mail caml-list-request@inria.fr Archives: http://caml.inria.fr Bug reports: http://caml.inria.fr/bin/caml-bugs FAQ: http://caml.inria.fr/FAQ/ Beginner's list: http://groups.yahoo.com/group/ocaml_beginners