RE: [Caml-list] tail recursion and register poor Intel architecture

[Brian Hurt <bhurt@spnz.org>]

On Thu, 8 Jul 2004, Brandon J. Van Every wrote:

> That is true/false.  These are *not* synonymous sets of registers.  MMX
> registers are incompatible with the x87 FPU as you describe, because
> they're aliases/repurposings of the x87 FPU registers.  The *XMM*
> registers, associated with SSE/SSE2, are entirely separate registers.
> You can most certainly use the x87 FPU simultaneously with those, no
> special instruction state dances required.

Point.

> Those of you with particularly old computers are cheap-ass bastards who
> should afford buying a new one every 6 years or so.  :-)  I do believe
> in buying "behind the power curve," but come on, by the time anybody
> actually implements what I'm talking about the P-IIIs will be mostly
> gone.

The brand new cpu/motherboard I bought six months ago doesn't have SSE2.  
I'll give you a hint: 
http://www.nanosys1.com/cpu-amd-xp-220d.html

Not top of the line, I admit, but still a nice box.

-- 
"Usenet is like a herd of performing elephants with diarrhea -- massive,
difficult to redirect, awe-inspiring, entertaining, and a source of
mind-boggling amounts of excrement when you least expect it."
                                - Gene Spafford 
Brian

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