From mboxrd@z Thu Jan 1 00:00:00 1970 Received: (from majordomo@localhost) by pauillac.inria.fr (8.7.6/8.7.3) id GAA22333; Fri, 9 Jul 2004 06:29:19 +0200 (MET DST) X-Authentication-Warning: pauillac.inria.fr: majordomo set sender to owner-caml-list@pauillac.inria.fr using -f Received: from nez-perce.inria.fr (nez-perce.inria.fr [192.93.2.78]) by pauillac.inria.fr (8.7.6/8.7.3) with ESMTP id GAA22171 for ; Fri, 9 Jul 2004 06:29:18 +0200 (MET DST) Received: from herd.plethora.net (herd.plethora.net [205.166.146.1]) by nez-perce.inria.fr (8.12.10/8.12.10) with ESMTP id i694TGEV016676 for ; Fri, 9 Jul 2004 06:29:17 +0200 Received: from bhurt.plethora.net (bhurt.plethora.net [205.166.146.49]) by herd.plethora.net (8.11.6/8.10.1) with ESMTP id i694TCi07213; Thu, 8 Jul 2004 23:29:12 -0500 (CDT) Date: Thu, 8 Jul 2004 23:36:00 -0500 (CDT) From: Brian Hurt X-X-Sender: bhurt@localhost.localdomain To: "Brandon J. Van Every" cc: caml Subject: RE: [Caml-list] tail recursion and register poor Intel architecture In-Reply-To: Message-ID: MIME-Version: 1.0 Content-Type: TEXT/PLAIN; charset=US-ASCII X-Miltered: at nez-perce with ID 40EE1F1C.000 by Joe's j-chkmail (http://j-chkmail.ensmp.fr)! X-Loop: caml-list@inria.fr X-Spam: no; 0.00; caml-list:01 recursion:01 brandon:99 incompatible:01 implements:01 wrote:03 tail:03 anybody:03 redirect:95 hint:04 mostly:06 jul:06 brian:06 brian:06 source:07 Sender: owner-caml-list@pauillac.inria.fr Precedence: bulk On Thu, 8 Jul 2004, Brandon J. Van Every wrote: > That is true/false. These are *not* synonymous sets of registers. MMX > registers are incompatible with the x87 FPU as you describe, because > they're aliases/repurposings of the x87 FPU registers. The *XMM* > registers, associated with SSE/SSE2, are entirely separate registers. > You can most certainly use the x87 FPU simultaneously with those, no > special instruction state dances required. Point. > Those of you with particularly old computers are cheap-ass bastards who > should afford buying a new one every 6 years or so. :-) I do believe > in buying "behind the power curve," but come on, by the time anybody > actually implements what I'm talking about the P-IIIs will be mostly > gone. The brand new cpu/motherboard I bought six months ago doesn't have SSE2. I'll give you a hint: http://www.nanosys1.com/cpu-amd-xp-220d.html Not top of the line, I admit, but still a nice box. -- "Usenet is like a herd of performing elephants with diarrhea -- massive, difficult to redirect, awe-inspiring, entertaining, and a source of mind-boggling amounts of excrement when you least expect it." - Gene Spafford Brian ------------------- To unsubscribe, mail caml-list-request@inria.fr Archives: http://caml.inria.fr Bug reports: http://caml.inria.fr/bin/caml-bugs FAQ: http://caml.inria.fr/FAQ/ Beginner's list: http://groups.yahoo.com/group/ocaml_beginners