From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Original-To: caml-list@yquem.inria.fr Delivered-To: caml-list@yquem.inria.fr Received: from concorde.inria.fr (concorde.inria.fr [192.93.2.39]) by yquem.inria.fr (Postfix) with ESMTP id 96074BB81 for ; Wed, 22 Mar 2006 00:52:16 +0100 (CET) Received: from pauillac.inria.fr (pauillac.inria.fr [128.93.11.35]) by concorde.inria.fr (8.13.0/8.13.0) with ESMTP id k2LNqGUp010979 for ; Wed, 22 Mar 2006 00:52:16 +0100 Received: from nez-perce.inria.fr (nez-perce.inria.fr [192.93.2.78]) by pauillac.inria.fr (8.7.6/8.7.3) with ESMTP id AAA06315 for ; Wed, 22 Mar 2006 00:52:15 +0100 (MET) Received: from conn.mc.mpls.visi.com (conn.mc.mpls.visi.com [208.42.156.2]) by nez-perce.inria.fr (8.13.0/8.13.0) with ESMTP id k2LNqEnZ004897 for ; Wed, 22 Mar 2006 00:52:15 +0100 Received: from [192.168.42.2] (bhurt.dsl.visi.com [208.42.141.66]) by conn.mc.mpls.visi.com (Postfix) with ESMTP id E81758513 for ; Tue, 21 Mar 2006 17:52:13 -0600 (CST) Date: Tue, 21 Mar 2006 17:53:03 -0600 (CST) From: Brian Hurt X-X-Sender: bhurt@localhost.localdomain To: caml-list Subject: Re: [Caml-list] Severe loss of performance due to new signal handling (fwd) Message-ID: MIME-Version: 1.0 Content-Type: MULTIPART/Mixed; BOUNDARY="8323328-360415344-1142980371=:10435" Content-ID: X-Miltered: at concorde with ID 442091B0.000 by Joe's j-chkmail (http://j-chkmail.ensmp.fr)! X-Miltered: at nez-perce with ID 442091AE.002 by Joe's j-chkmail (http://j-chkmail.ensmp.fr)! X-Spam: no; 0.00; off-list:01 parallelism:01 2006:98 wrote:01 caml-list:01 caml-list:01 readable:01 hmm:02 unreadable:02 contention:04 brian:04 brian:04 problem:05 tue:06 tue:06 X-Attachments: type="TEXT/X-CSRC" name="lock2.c" name="lock2.c" X-Spam-Checker-Version: SpamAssassin 3.0.3 (2005-04-27) on yquem.inria.fr X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=none autolearn=disabled version=3.0.3 This message is in MIME format. The first part should be readable text, while the remaining parts are likely unreadable without MIME-aware tools. --8323328-360415344-1142980371=:10435 Content-Type: TEXT/PLAIN; CHARSET=US-ASCII; FORMAT=flowed Content-ID: Opps- didn't intend this message to be off-list. ---------- Forwarded message ---------- Date: Tue, 21 Mar 2006 16:32:51 -0600 (CST) From: Brian Hurt To: Robert Roessler Subject: Re: [Caml-list] Severe loss of performance due to new signal handling On Tue, 21 Mar 2006, Robert Roessler wrote: > Well, I *thought* there was a marked absence of "bit-level parallelism" in > the signal-handling... ;) > > So the "expense" of individual atomic operations is not really what is at the > heart of this performance problem... Hmm. Maybe not. I'm measuring a 4 clock cycle cost for a xchgl, both with and without a lock on my Athlon XP 1.8GHz. See attached code. Naturally, this is a uniprocessor machine and the memory location is in L1 cache (or will be soon), and no contention, so this is definately best case. 4 clocks is about rights for a read and a write to L1 cache (each L1 cache access taking 2 clocks). Brian --8323328-360415344-1142980371=:10435 Content-Type: TEXT/X-CSRC; CHARSET=US-ASCII; NAME=lock2.c Content-Transfer-Encoding: BASE64 Content-ID: Content-Description: Content-Disposition: ATTACHMENT; FILENAME=lock2.c I2luY2x1ZGUgPHN0ZGlvLmg+DQojaW5jbHVkZSA8cHRocmVhZC5oPg0KI2lu Y2x1ZGUgPHNlbWFwaG9yZS5oPg0KDQojaWYgIWRlZmluZWQoX19HTlVDX18p ICYmICFkZWZpbmVkKF9faTM4Nl9fKQ0KI2Vycm9yIFRoaXMgY29kZSBvbmx5 IHdvcmtzIHdpdGggR0NDL2kzODYuDQojZW5kaWYNCg0KLyogVGhlIHJlYXNv biB0aGlzIG9ubHkgd29ya3MgdW5kZXIgR05VIEMgYW5kIHRoZSB4ODYgaXMg d2UncmUgdXNpbmcgdGhlDQogKiByZHRzYyBpbnN0cnVjdGlvbi4NCiAqLw0K c3RhdGljIGlubGluZSB1bnNpZ25lZCBsb25nIGxvbmcgcmR0c2MoKSB7DQoJ dW5zaWduZWQgbG9uZyBsb25nIHJ2YWw7DQoNCglhc20gdm9sYXRpbGUgKCJy ZHRzYyIgOiAiPUEiIChydmFsKSk7DQoJcmV0dXJuIHJ2YWw7DQp9DQoNCnN0 YXRpYyBpbmxpbmUgdW5zaWduZWQgbG9uZyByZWFkX2FuZF9jbGVhcih1bnNp Z25lZCBsb25nICogcHRyKSB7DQogICAgdW5zaWduZWQgbG9uZyBydmFsOw0K DQoJYXNtIHZvbGF0aWxlICgibG9jayB4Y2hnbCAlMCwgJTEiIDogIj1yIiAo cnZhbCksICIrbSIgKCpwdHIpIDogIjAiICgwKSk7DQogICAgcmV0dXJuIHJ2 YWw7DQp9DQoNCg0KaW50IG1haW4odm9pZCkgew0KCWludCBpOw0KICAgIHZv bGF0aWxlIHVuc2lnbmVkIGxvbmcgdHJhc2g7DQogICAgdW5zaWduZWQgbG9u ZyB2YWwgPSAxOw0KCXVuc2lnbmVkIGxvbmcgbG9uZyBzdGFydCwgc3RvcCwg dGltZSwgbWluOw0KDQoJLyogVGltZSBob3cgbG9uZyBhIHJkdHNjIHRha2Vz LSB3ZSBkbyB0aGlzIHRlbiB0aW1lcyBhbmQgdGFrZSB0aGUgDQoJICogY2hl YXBlc3QgcnVuLg0KCSAqLw0KCW1pbiA9IH4wdWxsOw0KCWZvciAoaSA9IDA7 IGkgPCAxMDsgKytpKSB7DQoJCXN0YXJ0ID0gcmR0c2MoKTsNCgkJdHJhc2gg PSAwOw0KCQlzdG9wID0gcmR0c2MoKTsNCgkJdGltZSA9IHN0b3AgLSBzdGFy dDsNCgkJaWYgKHRpbWUgPCBtaW4pIHsNCgkJCW1pbiA9IHRpbWU7DQoJCX0N Cgl9DQoJcHJpbnRmKCJNaW5pbXVtIHRpbWUgZm9yIGEgcmR0c2MgaW5zdHJ1 Y3Rpb24gKGluIGNsb2Nrcyk6ICVsbHVcbiIsIG1pbik7DQoNCgltaW4gPSB+ MHVsbDsNCglmb3IgKGkgPSAwOyBpIDwgMTA7ICsraSkgew0KCQl2YWwgPSAx Ow0KCQlzdGFydCA9IHJkdHNjKCk7DQoJCXRyYXNoID0gcmVhZF9hbmRfY2xl YXIoJnZhbCk7DQoJCXN0b3AgPSByZHRzYygpOw0KCQl0aW1lID0gc3RvcCAt IHN0YXJ0Ow0KCQlpZiAodGltZSA8IG1pbikgew0KCQkJbWluID0gdGltZTsN CgkJfQ0KCX0NCglwcmludGYoIk1pbmltdW0gdGltZSBmb3IgYSByZWFkX2Fu ZF9jbGVhcigpICsgcmR0c2MgKGluIGNsb2Nrcyk6ICVsbHVcbiIsIG1pbik7 DQoJcmV0dXJuIDA7DQp9DQoNCg== --8323328-360415344-1142980371=:10435--