Re: SMP multithreading

[Sylvain Le Gall <sylvain@le-gall.net>]

On 17-11-2010, Goswin von Brederlow <goswin-v-b@web.de> wrote:
> Sylvain Le Gall <sylvain@le-gall.net> writes:
>
>> Hi,
>>
>> On 15-11-2010, Wolfgang Draxinger <wdraxinger.maillist@draxit.de> wrote:
>>> Hi,
>>>
>>> I've just read
>>> http://caml.inria.fr/pub/ml-archives/caml-list/2002/11/64c14acb90cb14bedb2cacb73338fb15.en.html
>>> in particular this paragraph:
>>>| What about hyperthreading?  Well, I believe it's the last convulsive
>>>| movement of SMP's corpse :-)  We'll see how it goes market-wise.  At
>>>| any rate, the speedups announced for hyperthreading in the Pentium 4
>>>| are below a factor of 1.5; probably not enough to offset the overhead
>>>| of making the OCaml runtime system thread-safe.
>>>
>>> This reads just like the "640k ought be enough for everyone". Multicore
>>> systems are the standard today. Even the cheapest consumer machines
>>> come with at least two cores. Once can easily get 6 core machines today.
>>>
>>> Still thinking SMP was a niche and was dying?
>>>
>>
>> Hyperthreading was never remarkable about performance or whatever and is
>> probably not pure SMP (emulated SMP maybe?).
>
> Hyperthreading is a hack to better utilize idle cpu sub units. The CPU
> has multiple complete sets of registers, one per hyper thread. Execution
> of the threads is interleaved. Now when one thread is doing some
> floating point operation the cpu switches over to another thread and
> lets it do some integer aritmetic. But that assumes the threads are
> using different sub units. If they are using the same unit then they
> just block each other and no speedup occurs.
>
> The speedup of hyperthreading is purely from avoiding dead cycles when
> one thread waits for something. On te other hand the cache is shared
> between threads so per thread it is smaller and more easily
> trashed. Hyperthreading can be much slower too.
>

Indeed, the HT extension was designed to reduce pipeline bubbles, which
most of the time occurs when you need to load data from a slow memory
(slow = RAM as opposed to L1/L2 cache). 

In the old time of my P4, ocaml was performing quite well on the
processor. One story about it: while compiling cameleon on it, I often
get into "thermal warning" (the CPU was overheating). I think it could
have been related to the fact the CPU idle level was very low (e.g. no
pipeline bubble). I always thought that this was related to the fact the
minor heap can be stored inside the cache and that reduces the hit/miss
factor (i.e. avoid fetching data in RAM). I have never really tested
this hypothesis. Maybe you can tell me your opinion about this?

Regards,
Sylvain Le Gall