From mboxrd@z Thu Jan 1 00:00:00 1970 Received: (from majordomo@localhost) by pauillac.inria.fr (8.7.6/8.7.3) id OAA15787; Mon, 10 Jun 2002 14:05:50 +0200 (MET DST) X-Authentication-Warning: pauillac.inria.fr: majordomo set sender to owner-caml-list@pauillac.inria.fr using -f Received: from concorde.inria.fr (concorde.inria.fr [192.93.2.39]) by pauillac.inria.fr (8.7.6/8.7.3) with ESMTP id OAA15647 for ; Mon, 10 Jun 2002 14:05:49 +0200 (MET DST) Received: from relay.rinet.ru (relay.rinet.ru [195.54.192.35]) by concorde.inria.fr (8.11.1/8.11.1) with ESMTP id g5AC5mb11170 for ; Mon, 10 Jun 2002 14:05:48 +0200 (MET DST) Received: (from uucp@localhost) by relay.rinet.ru (8.11.6/8.11.6) with UUCP id g5AC5h301724 for caml-list@inria.fr; Mon, 10 Jun 2002 16:05:43 +0400 (MSD) X-Envelope-To: caml-list@inria.fr Received: from bely.stormoff (BELY) [192.168.0.10] by stormoff with esmtp (Exim 3.12 #1 (Debian)) id 17HNsC-00068C-00; Mon, 10 Jun 2002 16:02:12 +0400 X-Comment-To: Chris Hecker To: caml-list@inria.fr Subject: Re: [Caml-list] Timing Ocaml References: <4.3.2.7.2.20020609232056.029ec260@mail.d6.com> From: Dmitry Bely Date: Mon, 10 Jun 2002 16:02:12 +0400 In-Reply-To: <4.3.2.7.2.20020609232056.029ec260@mail.d6.com> (Chris Hecker's message of "Sun, 09 Jun 2002 23:24:29 -0700") Message-ID: User-Agent: Gnus/5.090007 (Oort Gnus v0.07) XEmacs/21.4 (Economic Science (Windows [1]), i586-pc-win32) MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Sender: owner-caml-list@pauillac.inria.fr Precedence: bulk Chris Hecker writes: >>* The GNU C compiler gcc is recommended, as the bytecode >> interpreter takes advantage of gcc-specific features to enhance >> performance. >>What is the nature of these optimizations? > > GCC lets you take the address of a label. You can see in > byterun/interp.c that it uses a jump table instead of a switch when > you're using GCC. > > At least, that's what it looks like. I would rather say that gcc allows to force register allocation for some specific variable, while MSVC always ignore "register" specifier. #if defined(__GNUC__) && !defined(DEBUG) [...] #ifdef __i386__ #define PC_REG asm("%esi") #define SP_REG asm("%edi") #define ACCU_REG #endif [...] #endif /* The interpreter itself */ value interprete(code_t prog, asize_t prog_size) { #ifdef PC_REG register code_t pc PC_REG; register value * sp SP_REG; register value accu ACCU_REG; #else register code_t pc; register value * sp; register value accu; #endif In the same time MSVC has very good optimizer and it is very strange, that two explicit register variables lead to 30% performance gain... Hope to hear from you soon, Dmitry ------------------- To unsubscribe, mail caml-list-request@inria.fr Archives: http://caml.inria.fr Bug reports: http://caml.inria.fr/bin/caml-bugs FAQ: http://caml.inria.fr/FAQ/ Beginner's list: http://groups.yahoo.com/group/ocaml_beginners