From mboxrd@z Thu Jan 1 00:00:00 1970 X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on inbox.vuxu.org X-Spam-Level: X-Spam-Status: No, score=-3.1 required=5.0 tests=DKIM_INVALID,DKIM_SIGNED, MAILING_LIST_MULTI,RCVD_IN_DNSWL_MED,RCVD_IN_MSPIKE_H3, RCVD_IN_MSPIKE_WL,SPF_PASS autolearn=ham autolearn_force=no version=3.4.2 Received: (qmail 731 invoked from network); 15 Apr 2020 14:25:28 -0000 Received-SPF: pass (mother.openwall.net: domain of lists.openwall.com designates 195.42.179.200 as permitted sender) receiver=inbox.vuxu.org; client-ip=195.42.179.200 envelope-from= Received: from mother.openwall.net (195.42.179.200) by inbox.vuxu.org with UTF8ESMTPZ; 15 Apr 2020 14:25:28 -0000 Received: (qmail 7578 invoked by uid 550); 15 Apr 2020 14:22:19 -0000 Mailing-List: contact musl-help@lists.openwall.com; run by ezmlm Precedence: bulk List-Post: List-Help: List-Unsubscribe: List-Subscribe: List-ID: Reply-To: musl@lists.openwall.com Received: (qmail 16166 invoked from network); 15 Apr 2020 13:19:45 -0000 DKIM-Signature: a=rsa-sha256; v=1; c=relaxed/relaxed; d=mg.codeaurora.org; q=dns/txt; s=smtp; t=1586956786; h=Content-Type: MIME-Version: Message-ID: Date: Subject: To: From: Sender; bh=IAkqXpDl4tKd/jqmx7xcbEhV3GCwxgRczHu/LCLRD6w=; b=ISPZa2GPgKwn6/RKIDuLM2dICyH+ZRFPDnKSsiwYjG+Cjd3s0/5QqxpQDTj4fzj6UitDuTgE G3fSxgB9PzFv19+DbsvqzYeKLnC3aGCunLPwU7uquYLITqinKfrfGmo6oUH/Vc6NsNzm93k0 psnPGX3+e78cL59xXIsOdbq3dCg= X-Mailgun-Sending-Ip: 104.130.122.27 X-Mailgun-Sid: WyI1MGQzMyIsICJtdXNsQGxpc3RzLm9wZW53YWxsLmNvbSIsICJiZTllNGEiXQ== Sender: sidneym=codeaurora.org@mg.codeaurora.org DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 92AF7C43636 Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; spf=none smtp.mailfrom=sidneym@codeaurora.org From: To: Date: Wed, 15 Apr 2020 08:19:29 -0500 Message-ID: <000a01d61328$7f2614b0$7d723e10$@codeaurora.org> MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="----=_NextPart_000_000B_01D612FE.96516C40" X-Mailer: Microsoft Outlook 16.0 Thread-Index: AdYSkWn0xK5kqFh3TQiX/4MoUYftCg== Content-Language: en-us X-MS-TNEF-Correlator: 000000000B1BB618A7E047428FD3538EB0AD4B070700C3B68E10F77511CEB4CD00AA00BBB6E600000000000D0000D24C1ADBC84E71428851FA5B72EAAF3800000000E2180000 Subject: [musl] Hexagon DSP support This is a multipart message in MIME format. ------=_NextPart_000_000B_01D612FE.96516C40 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Recently work has been done with clang/llvm/lld to extend support for Qualcomm's Hexagon DSP to a Linux target. At this point the publicly available LLVM tools are able to build and run Hexagon programs via QEMU. I've attached a patch that add the Hexagon bits to musl. The optimized routines have been purposely omitted to keep the size and complexity to a minimum. The changes are being mirrored here: https://github.com/quic/musl/tree/hexagon The QEMU mirror is here: https://github.com/quic/qemu A description of the assembly language is here: https://developer.qualcomm.com/download/hexagon/hexagon-v5x-programmers-refe rence-manual.pdf?referrer=node/6116 The objective is to have enough freely available tools and libraries that any user could develop code for the DSP. The C-library is an important part of that stack and this patch is intended to start a discussion of what would need to happen in order for Hexagon to be added to the musl sources. I've tested this using libc-test (git://repo.or.cz/libc-test) and 56 errors are reported. The support for Hexagon in QEMU is on-going and while some of the errors (math) may be attributed to QEMU most also happen on hardware. A good chunk fail due to floating point exception status or precision. Beyond the above testing a large number of packages have been built using buildroot with our internal llvm tools. No issues outside of tweaks to avoid glibc assumptions were seen. ------=_NextPart_000_000B_01D612FE.96516C40 Content-Type: application/ms-tnef; name="winmail.dat" Content-Transfer-Encoding: quoted-printable Content-Disposition: attachment; filename="winmail.dat" x=9F>"=1E=0D=01=06=90=08=00=04=00=00=00=00=00=01=00=01=00=01=07=90=06=00=08= =00=00=00=E4=04=00=00=00=00=00=00=E8=00=01=08=80=07=00=18=00=00=00IPM.Mic= rosoft Mail.Note=001=08=01=03=90=06=00 = =0B=00=00*=00=00=00=0B=00=02=00=01=00=00=00=03=00&=00=00=00=00=00=0B=00)=00= =00=00=00=00=1E=00p=00=01=00=00=00=14=00=00=00Hexagon DSP = support=00=02=01q=00=01=00=00=00=16=00=00=00=01=D6=12=91i=F4=C4=AEd=A8XwM= =08=97=FF=83(Q=87=ED=0A= =00=00=0B=00=01=0E=00=00=00=00=02=01=0A= =0E=01=00=00=00.=00=00=00=00=00=00=00=0B=1B=B6=18=A7=E0GB=8F=D3S=8E=B0=AD= K=07=01=00=C3=B6=8E=10=F7u=11=CE=B4=CD=00=AA=00=BB=B6=E6=00=00=00=00=00=0E= =00=00=00=00=03=00=14=0E=01=00=00=00=1E=00(=0E=01=00=00=007=00=00=0000000= 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=F0=055u}|`=03=00=16=10=00=00=00=00=03=00=0D4=FD?=AD=0E=03=00=0F4=FD?=AD=0E= =02=01=144=01=00=00=00=10=00=00=00=E9/=EBu=96PD=86=83=B8}=E5"=AAIH=02=01=E2= e=01=00=00=00=14=00=00=00=1C=F4=00=C5-=E7(B=AA=C4=90=C7=A1=EF6P=000=00-=02= =01=E3e=01=00=00=00=15=00=00=00=14=1C=F4=00=C5-=E7(B=AA=C4=90=C7=A1=EF6P=00= 0=00-=00=00=00=02=01=7F=00=01=00=00=00=8D=00=00=00000000000B1BB618A7E0474= 28FD3538EB0AD4B070700C3B68E10F77511CEB4CD00AA00BBB6E600000000000D0000D24C= 1ADBC84E71428851FA5B72EAAF3800000000E2180000=00=00=00=00=03=00=06=10=C9=80= =87=94=03=00=07=10=AA=04=00=00=03=00=10=10=00=00=00=00=03=00=11=10=01=00=00= =00=1E=00=08=10=01=00=00=00e=00=00=00RECENTLYWORKHASBEENDONEWITHCLANG/LLV= M/LLDTOEXTENDSUPPORTFORQUALCOMMSHEXAGONDSPTOALINUXTARGETATTHISPO=00=00=00= =00=BA=C7=02=02=90=06=00=0E=00=00=00=01=00=FF=FF=FF=FF =00 = =00=00=00=00=00=3D=04=02=13=80=03=00=0E=00=00=00=E4=07=04=00=0E=00=12=00=15= =009=00=02=00_=01=02=0F=80=06=00=D8=A1=00=00From = 67cc85af072fafa3af7426dc8d2433b54d4f3734 Mon Sep 17 00:00:00 2001=0A= From: Sid Manning =0A= Date: Tue, 12 Nov 2019 10:54:36 -0600=0A= Subject: [PATCH] [musl][hexagon] Add Hexagon Support=0A= =0A= ---=0A= arch/hexagon/atomic_arch.h | 183 +++++++++++++++=0A= arch/hexagon/bits/alltypes.h.in | 26 +++=0A= arch/hexagon/bits/fenv.h | 20 ++=0A= arch/hexagon/bits/float.h | 16 ++=0A= arch/hexagon/bits/posix.h | 2 +=0A= arch/hexagon/bits/setjmp.h | 4 +=0A= arch/hexagon/bits/signal.h | 105 +++++++++=0A= arch/hexagon/bits/stat.h | 24 ++=0A= arch/hexagon/bits/stdint.h | 20 ++=0A= arch/hexagon/bits/syscall.h.in | 298 +++++++++++++++++++++++++=0A= arch/hexagon/crt_arch.h | 35 +++=0A= arch/hexagon/kstat.h | 21 ++=0A= arch/hexagon/pthread_arch.h | 14 ++=0A= arch/hexagon/reloc.h | 25 +++=0A= arch/hexagon/syscall_arch.h | 77 +++++++=0A= configure | 1 +=0A= include/elf.h | 101 +++++++++=0A= src/fenv/hexagon/fenv.S | 143 ++++++++++++=0A= src/setjmp/hexagon/longjmp.s | 25 +++=0A= src/setjmp/hexagon/setjmp.s | 24 ++=0A= src/signal/hexagon/restore.s | 11 +=0A= src/signal/hexagon/siglongjmp.c | 15 ++=0A= src/signal/hexagon/sigsetjmp.s | 34 +++=0A= src/thread/hexagon/__set_thread_area.s | 7 +=0A= src/thread/hexagon/__unmapself.s | 11 +=0A= src/thread/hexagon/clone.s | 37 +++=0A= src/thread/hexagon/syscall_cp.s | 35 +++=0A= 27 files changed, 1314 insertions(+)=0A= create mode 100644 arch/hexagon/atomic_arch.h=0A= create mode 100644 arch/hexagon/bits/alltypes.h.in=0A= create mode 100644 arch/hexagon/bits/fenv.h=0A= create mode 100644 arch/hexagon/bits/float.h=0A= create mode 100644 arch/hexagon/bits/posix.h=0A= create mode 100644 arch/hexagon/bits/setjmp.h=0A= create mode 100644 arch/hexagon/bits/signal.h=0A= create mode 100644 arch/hexagon/bits/stat.h=0A= create mode 100644 arch/hexagon/bits/stdint.h=0A= create mode 100644 arch/hexagon/bits/syscall.h.in=0A= create mode 100644 arch/hexagon/crt_arch.h=0A= create mode 100644 arch/hexagon/kstat.h=0A= create mode 100644 arch/hexagon/pthread_arch.h=0A= create mode 100644 arch/hexagon/reloc.h=0A= create mode 100644 arch/hexagon/syscall_arch.h=0A= create mode 100644 src/fenv/hexagon/fenv.S=0A= create mode 100644 src/setjmp/hexagon/longjmp.s=0A= create mode 100644 src/setjmp/hexagon/setjmp.s=0A= create mode 100644 src/signal/hexagon/restore.s=0A= create mode 100644 src/signal/hexagon/siglongjmp.c=0A= create mode 100644 src/signal/hexagon/sigsetjmp.s=0A= create mode 100644 src/thread/hexagon/__set_thread_area.s=0A= create mode 100644 src/thread/hexagon/__unmapself.s=0A= create mode 100644 src/thread/hexagon/clone.s=0A= create mode 100644 src/thread/hexagon/syscall_cp.s=0A= =0A= diff --git a/arch/hexagon/atomic_arch.h b/arch/hexagon/atomic_arch.h=0A= new file mode 100644=0A= index 00000000..768b5110=0A= --- /dev/null=0A= +++ b/arch/hexagon/atomic_arch.h=0A= @@ -0,0 +1,183 @@=0A= +#define a_ctz_32 a_ctz_32=0A= +static inline int a_ctz_32(unsigned long x)=0A= +{=0A= + __asm__(=0A= + "%0 =3D ct0(%0)\n\t"=0A= + : "+r"(x));=0A= + return x;=0A= +}=0A= +=0A= +#define a_ctz_64 a_ctz_64=0A= +static inline int a_ctz_64(uint64_t x)=0A= +{=0A= + int count;=0A= + __asm__(=0A= + "%0 =3D ct0(%1)\n\t"=0A= + : "=3Dr"(count) : "r"(x));=0A= + return count;=0A= +}=0A= +=0A= +#define a_cas a_cas=0A= +static inline int a_cas(volatile int *p, int t, int s)=0A= +{=0A= + int dummy;=0A= + __asm__ __volatile__(=0A= + "1: %0 =3D memw_locked(%1)\n\t"=0A= + " { p0 =3D cmp.eq(%0, %2)\n\t"=0A= + " if (!p0.new) jump:nt 2f }\n\t"=0A= + " memw_locked(%1, p0) =3D %3\n\t"=0A= + " if (!p0) jump 1b\n\t"=0A= + "2: \n\t"=0A= + : "=3D&r"(dummy)=0A= + : "r"(p), "r"(t), "r"(s)=0A= + : "p0", "memory" );=0A= + return dummy;=0A= +}=0A= +=0A= +#define a_cas_p a_cas_p=0A= +static inline void *a_cas_p(volatile void *p, void *t, void *s)=0A= +{=0A= + return (void *)a_cas(p, (int)t, (int)s);=0A= +}=0A= +=0A= +#define a_swap a_swap=0A= +static inline int a_swap(volatile int *x, int v)=0A= +{=0A= + int old, dummy;=0A= + __asm__ __volatile__(=0A= + " %1 =3D %3\n\t"=0A= + "1: %0 =3D memw_locked(%2)\n\t"=0A= + " memw_locked(%2, p0) =3D %1\n\t"=0A= + " if (!p0) jump 1b\n\t"=0A= + : "=3D&r"(old), "=3D&r"(dummy)=0A= + : "r"(x), "r"(v)=0A= + : "p0", "memory" );=0A= + return old;=0A= +}=0A= +=0A= +#define a_fetch_add a_fetch_add=0A= +static inline int a_fetch_add(volatile int *x, int v)=0A= +{=0A= + int old, dummy;=0A= + __asm__ __volatile__(=0A= + "1: %0 =3D memw_locked(%2)\n\t"=0A= + " %1 =3D add(%0, %3)\n\t"=0A= + " memw_locked(%2, p0) =3D %1\n\t"=0A= + " if (!p0) jump 1b\n\t"=0A= + : "=3D&r"(old), "=3D&r"(dummy)=0A= + : "r"(x), "r"(v)=0A= + : "p0", "memory" );=0A= + return old;=0A= +}=0A= +=0A= +#define a_inc a_inc=0A= +static inline void a_inc(volatile int *x)=0A= +{=0A= + a_fetch_add(x, 1);=0A= +}=0A= +=0A= +#define a_dec a_dec=0A= +static inline void a_dec(volatile int *x)=0A= +{=0A= + int dummy;=0A= + __asm__ __volatile__(=0A= + "1: %0 =3D memw_locked(%1)\n\t"=0A= + " %0 =3D add(%0, #-1)\n\t"=0A= + " memw_locked(%1, p0) =3D %0\n\t"=0A= + " if (!p0) jump 1b\n\t"=0A= + : "=3D&r"(dummy)=0A= + : "r"(x)=0A= + : "p0", "memory" );=0A= +}=0A= +=0A= +#define a_store a_store=0A= +static inline void a_store(volatile int *p, int x)=0A= +{=0A= + int dummy;=0A= + __asm__ __volatile__(=0A= + "1: %0 =3D memw_locked(%1)\n\t"=0A= + " memw_locked(%1, p0) =3D %2\n\t"=0A= + " if (!p0) jump 1b\n\t"=0A= + : "=3D&r"(dummy)=0A= + : "r"(p), "r"(x)=0A= + : "p0", "memory" );=0A= +}=0A= +=0A= +#define a_barrier a_barrier=0A= +static inline void a_barrier()=0A= +{=0A= + __asm__ __volatile__ ("barrier" ::: "memory");=0A= +}=0A= +#define a_spin a_spin=0A= +static inline void a_spin()=0A= +{=0A= + __asm__ __volatile__ ("pause(#255)" :::);=0A= +}=0A= +=0A= +#define a_crash a_crash=0A= +static inline void a_crash()=0A= +{=0A= + *(volatile char *)0=3D0;=0A= +}=0A= +=0A= +#define a_and a_and=0A= +static inline void a_and(volatile int *p, int v)=0A= +{=0A= + int dummy;=0A= + __asm__ __volatile__(=0A= + "1: %0 =3D memw_locked(%1)\n\t"=0A= + " %0 =3D and(%0, %2)\n\t"=0A= + " memw_locked(%1, p0) =3D %0\n\t"=0A= + " if (!p0) jump 1b\n\t"=0A= + : "=3D&r"(dummy)=0A= + : "r"(p), "r"(v)=0A= + : "p0", "memory" );=0A= +}=0A= +=0A= +#define a_or a_or=0A= +static inline void a_or(volatile int *p, int v)=0A= +{=0A= + int dummy;=0A= + __asm__ __volatile__(=0A= + "1: %0 =3D memw_locked(%1)\n\t"=0A= + " %0 =3D or(%0, %2)\n\t"=0A= + " memw_locked(%1, p0) =3D %0\n\t"=0A= + " if (!p0) jump 1b\n\t"=0A= + : "=3D&r"(dummy)=0A= + : "r"(p), "r"(v)=0A= + : "p0", "memory" );=0A= +}=0A= +=0A= +#define a_or_l a_or_l=0A= +static inline void a_or_l(volatile void *p, long v)=0A= +{=0A= + a_or(p, v);=0A= +}=0A= +=0A= +#define a_and_64 a_and_64=0A= +static inline void a_and_64(volatile uint64_t *p, uint64_t v)=0A= +{=0A= + uint64_t dummy;=0A= + __asm__ __volatile__(=0A= + "1: %0 =3D memd_locked(%1)\n\t"=0A= + " %0 =3D and(%0, %2)\n\t"=0A= + " memd_locked(%1, p0) =3D %0\n\t"=0A= + " if (!p0) jump 1b\n\t"=0A= + : "=3D&r"(dummy)=0A= + : "r"(p), "r"(v)=0A= + : "p0", "memory" );=0A= +}=0A= +=0A= +#define a_or_64 a_or_64=0A= +static inline void a_or_64(volatile uint64_t *p, uint64_t v)=0A= +{=0A= + uint64_t dummy;=0A= + __asm__ __volatile__(=0A= + "1: %0 =3D memd_locked(%1)\n\t"=0A= + " %0 =3D or(%0, %2)\n\t"=0A= + " memd_locked(%1, p0) =3D %0\n\t"=0A= + " if (!p0) jump 1b\n\t"=0A= + : "=3D&r"(dummy)=0A= + : "r"(p), "r"(v)=0A= + : "p0", "memory" );=0A= +}=0A= diff --git a/arch/hexagon/bits/alltypes.h.in = b/arch/hexagon/bits/alltypes.h.in=0A= new file mode 100644=0A= index 00000000..b12359c2=0A= --- /dev/null=0A= +++ b/arch/hexagon/bits/alltypes.h.in=0A= @@ -0,0 +1,26 @@=0A= +#define _REDIR_TIME64 1=0A= +#define _Addr int=0A= +#define _Int64 long long=0A= +#define _Reg int=0A= +=0A= +#define __BYTE_ORDER 1234=0A= +#define __LONG_MAX 0x7fffffffL=0A= +=0A= +#ifndef __cplusplus=0A= +#ifdef __WCHAR_TYPE__=0A= +TYPEDEF __WCHAR_TYPE__ wchar_t;=0A= +#else=0A= +TYPEDEF long wchar_t;=0A= +#endif=0A= +#endif=0A= +=0A= +TYPEDEF float float_t;=0A= +TYPEDEF double double_t;=0A= +=0A= +#if !defined(__cplusplus)=0A= +TYPEDEF struct { _Alignas(8) long long __ll; long double __ld; } = max_align_t;=0A= +#elif defined(__GNUC__)=0A= +TYPEDEF struct { __attribute__((__aligned__(8))) long long __ll; long = double __ld; } max_align_t;=0A= +#else=0A= +TYPEDEF struct { alignas(8) long long __ll; long double __ld; } = max_align_t;=0A= +#endif=0A= diff --git a/arch/hexagon/bits/fenv.h b/arch/hexagon/bits/fenv.h=0A= new file mode 100644=0A= index 00000000..d3349306=0A= --- /dev/null=0A= +++ b/arch/hexagon/bits/fenv.h=0A= @@ -0,0 +1,20 @@=0A= +#define FE_INVALID (1 << 1)=0A= +#define FE_DIVBYZERO (1 << 2)=0A= +#define FE_OVERFLOW (1 << 3)=0A= +#define FE_UNDERFLOW (1 << 4)=0A= +#define FE_INEXACT (1 << 5)=0A= +#define FE_ALL_EXCEPT (FE_DIVBYZERO | FE_INEXACT | FE_INVALID | \=0A= + FE_OVERFLOW | FE_UNDERFLOW)=0A= +=0A= +#define FE_TONEAREST 0x00=0A= +#define FE_TOWARDZERO 0x01=0A= +#define FE_DOWNWARD 0x02=0A= +#define FE_UPWARD 0x03=0A= +=0A= +typedef unsigned long fexcept_t;=0A= +=0A= +typedef struct {=0A= + unsigned long __cw;=0A= +} fenv_t;=0A= +=0A= +#define FE_DFL_ENV ((const fenv_t *) -1)=0A= diff --git a/arch/hexagon/bits/float.h b/arch/hexagon/bits/float.h=0A= new file mode 100644=0A= index 00000000..c4a655e7=0A= --- /dev/null=0A= +++ b/arch/hexagon/bits/float.h=0A= @@ -0,0 +1,16 @@=0A= +#define FLT_EVAL_METHOD 0=0A= +=0A= +#define LDBL_TRUE_MIN 4.94065645841246544177e-324L=0A= +#define LDBL_MIN 2.22507385850720138309e-308L=0A= +#define LDBL_MAX 1.79769313486231570815e+308L=0A= +#define LDBL_EPSILON 2.22044604925031308085e-16L=0A= +=0A= +#define LDBL_MANT_DIG 53=0A= +#define LDBL_MIN_EXP (-1021)=0A= +#define LDBL_MAX_EXP 1024=0A= +=0A= +#define LDBL_DIG 15=0A= +#define LDBL_MIN_10_EXP (-307)=0A= +#define LDBL_MAX_10_EXP 308=0A= +=0A= +#define DECIMAL_DIG 17=0A= diff --git a/arch/hexagon/bits/posix.h b/arch/hexagon/bits/posix.h=0A= new file mode 100644=0A= index 00000000..30a38714=0A= --- /dev/null=0A= +++ b/arch/hexagon/bits/posix.h=0A= @@ -0,0 +1,2 @@=0A= +#define _POSIX_V6_ILP32_OFFBIG 1=0A= +#define _POSIX_V7_ILP32_OFFBIG 1=0A= diff --git a/arch/hexagon/bits/setjmp.h b/arch/hexagon/bits/setjmp.h=0A= new file mode 100644=0A= index 00000000..5ee5e49f=0A= --- /dev/null=0A= +++ b/arch/hexagon/bits/setjmp.h=0A= @@ -0,0 +1,4 @@=0A= +=0A= +typedef struct {=0A= + long regs[16];=0A= +} __jmp_buf[1] __attribute__((aligned (8)));=0A= diff --git a/arch/hexagon/bits/signal.h b/arch/hexagon/bits/signal.h=0A= new file mode 100644=0A= index 00000000..7a3b36d0=0A= --- /dev/null=0A= +++ b/arch/hexagon/bits/signal.h=0A= @@ -0,0 +1,105 @@=0A= +#if defined(_POSIX_SOURCE) || defined(_POSIX_C_SOURCE) \=0A= + || defined(_XOPEN_SOURCE) || defined(_GNU_SOURCE) || = defined(_BSD_SOURCE)=0A= +=0A= +#if defined(_XOPEN_SOURCE) || defined(_GNU_SOURCE) || = defined(_BSD_SOURCE)=0A= +#define MINSIGSTKSZ 2048=0A= +#define SIGSTKSZ 8192=0A= +#endif=0A= +=0A= +#if defined(_GNU_SOURCE) || defined(_BSD_SOURCE)=0A= +typedef int greg_t, gregset_t[18];=0A= +typedef struct sigcontext=0A= +{=0A= + unsigned long r0, r1, r2, r3;=0A= + unsigned long r4, r5, r6, r7;=0A= + unsigned long r8, r9, r10, r11;=0A= + unsigned long r12, r13, r14, r15;=0A= + unsigned long r16, r17, r18, r19;=0A= + unsigned long r20, r21, r22, r23;=0A= + unsigned long r24, r25, r26, r27;=0A= + unsigned long r28, r29, r30, r31;=0A= + unsigned long sa0;=0A= + unsigned long lc0;=0A= + unsigned long sa1;=0A= + unsigned long lc1;=0A= + unsigned long m0;=0A= + unsigned long m1;=0A= + unsigned long usr;=0A= + unsigned long p3_0;=0A= + unsigned long gp;=0A= + unsigned long ugp;=0A= + unsigned long pc;=0A= + unsigned long cause;=0A= + unsigned long badva;=0A= + unsigned long pad1;=0A= + unsigned long pad2;=0A= + unsigned long pad3;=0A= +} __attribute__((__aligned__(8))) mcontext_t;=0A= +#else=0A= +typedef struct {=0A= + unsigned long __regs[48];=0A= +} __attribute__((__aligned__(8))) mcontext_t;=0A= +#endif=0A= +=0A= +struct sigaltstack {=0A= + void *ss_sp;=0A= + int ss_flags;=0A= + size_t ss_size;=0A= +};=0A= +=0A= +typedef struct __ucontext {=0A= + unsigned long uc_flags;=0A= + struct __ucontext *uc_link;=0A= + stack_t uc_stack;=0A= + mcontext_t uc_mcontext;=0A= + sigset_t uc_sigmask;=0A= +// unsigned long long uc_regspace[64];=0A= +} ucontext_t;=0A= +=0A= +#define SA_NOCLDSTOP 1=0A= +#define SA_NOCLDWAIT 2=0A= +#define SA_SIGINFO 4=0A= +#define SA_ONSTACK 0x08000000=0A= +#define SA_RESTART 0x10000000=0A= +#define SA_NODEFER 0x40000000=0A= +#define SA_RESETHAND 0x80000000=0A= +#define SA_RESTORER 0x04000000=0A= +=0A= +#endif=0A= +=0A= +#define SIGHUP 1=0A= +#define SIGINT 2=0A= +#define SIGQUIT 3=0A= +#define SIGILL 4=0A= +#define SIGTRAP 5=0A= +#define SIGABRT 6=0A= +#define SIGIOT SIGABRT=0A= +#define SIGBUS 7=0A= +#define SIGFPE 8=0A= +#define SIGKILL 9=0A= +#define SIGUSR1 10=0A= +#define SIGSEGV 11=0A= +#define SIGUSR2 12=0A= +#define SIGPIPE 13=0A= +#define SIGALRM 14=0A= +#define SIGTERM 15=0A= +#define SIGSTKFLT 16=0A= +#define SIGCHLD 17=0A= +#define SIGCONT 18=0A= +#define SIGSTOP 19=0A= +#define SIGTSTP 20=0A= +#define SIGTTIN 21=0A= +#define SIGTTOU 22=0A= +#define SIGURG 23=0A= +#define SIGXCPU 24=0A= +#define SIGXFSZ 25=0A= +#define SIGVTALRM 26=0A= +#define SIGPROF 27=0A= +#define SIGWINCH 28=0A= +#define SIGIO 29=0A= +#define SIGPOLL 29=0A= +#define SIGPWR 30=0A= +#define SIGSYS 31=0A= +#define SIGUNUSED SIGSYS=0A= +=0A= +#define _NSIG 65=0A= diff --git a/arch/hexagon/bits/stat.h b/arch/hexagon/bits/stat.h=0A= new file mode 100644=0A= index 00000000..516233e6=0A= --- /dev/null=0A= +++ b/arch/hexagon/bits/stat.h=0A= @@ -0,0 +1,24 @@=0A= +// From kernel headers=0A= +=0A= +struct stat {=0A= + dev_t st_dev; /* Device. */=0A= + unsigned long long st_ino;=0A= + unsigned int st_mode; /* File mode. */=0A= + unsigned int st_nlink; /* Link count. */=0A= + unsigned int st_uid; /* User ID of the file's owner. = */=0A= + unsigned int st_gid; /* Group ID of the file's = group. */=0A= + unsigned long long st_rdev; /* Device number, if = device. */=0A= + unsigned long __pad1;=0A= + long long st_size;=0A= + blksize_t st_blksize; /* Optimal block size for I/O. = */=0A= + int __pad2;=0A= + long long st_blocks;=0A= + struct {=0A= + long tv_sec;=0A= + long tv_nsec;=0A= + } __st_atim32, __st_mtim32, __st_ctim32;=0A= + unsigned __unused[2];=0A= + struct timespec st_atim;=0A= + struct timespec st_mtim;=0A= + struct timespec st_ctim;=0A= +};=0A= diff --git a/arch/hexagon/bits/stdint.h b/arch/hexagon/bits/stdint.h=0A= new file mode 100644=0A= index 00000000..d1b27121=0A= --- /dev/null=0A= +++ b/arch/hexagon/bits/stdint.h=0A= @@ -0,0 +1,20 @@=0A= +typedef int32_t int_fast16_t;=0A= +typedef int32_t int_fast32_t;=0A= +typedef uint32_t uint_fast16_t;=0A= +typedef uint32_t uint_fast32_t;=0A= +=0A= +#define INT_FAST16_MIN INT32_MIN=0A= +#define INT_FAST32_MIN INT32_MIN=0A= +=0A= +#define INT_FAST16_MAX INT32_MAX=0A= +#define INT_FAST32_MAX INT32_MAX=0A= +=0A= +#define UINT_FAST16_MAX UINT32_MAX=0A= +#define UINT_FAST32_MAX UINT32_MAX=0A= +=0A= +#define INTPTR_MIN INT32_MIN=0A= +#define INTPTR_MAX INT32_MAX=0A= +#define UINTPTR_MAX UINT32_MAX=0A= +#define PTRDIFF_MIN INT32_MIN=0A= +#define PTRDIFF_MAX INT32_MAX=0A= +#define SIZE_MAX UINT32_MAX=0A= diff --git a/arch/hexagon/bits/syscall.h.in = b/arch/hexagon/bits/syscall.h.in=0A= new file mode 100644=0A= index 00000000..a5ae488b=0A= --- /dev/null=0A= +++ b/arch/hexagon/bits/syscall.h.in=0A= @@ -0,0 +1,298 @@=0A= +// Copied from kernel-headers-3.19 (unistd.h)=0A= +#define __NR_io_setup 0=0A= +#define __NR_io_destroy 1=0A= +#define __NR_io_submit 2=0A= +#define __NR_io_cancel 3=0A= +#define __NR_io_getevents 4=0A= +#define __NR_setxattr 5=0A= +#define __NR_lsetxattr 6=0A= +#define __NR_fsetxattr 7=0A= +#define __NR_getxattr 8=0A= +#define __NR_lgetxattr 9=0A= +#define __NR_fgetxattr 10=0A= +#define __NR_listxattr 11=0A= +#define __NR_llistxattr 12=0A= +#define __NR_flistxattr 13=0A= +#define __NR_removexattr 14=0A= +#define __NR_lremovexattr 15=0A= +#define __NR_fremovexattr 16=0A= +#define __NR_getcwd 17=0A= +#define __NR_lookup_dcookie 18=0A= +#define __NR_eventfd2 19=0A= +#define __NR_epoll_create1 20=0A= +#define __NR_epoll_ctl 21=0A= +#define __NR_epoll_pwait 22=0A= +#define __NR_dup 23=0A= +#define __NR_dup3 24=0A= +#define __NR3264_fcntl 25=0A= +#define __NR_inotify_init1 26=0A= +#define __NR_inotify_add_watch 27=0A= +#define __NR_inotify_rm_watch 28=0A= +#define __NR_ioctl 29=0A= +#define __NR_ioprio_set 30=0A= +#define __NR_ioprio_get 31=0A= +#define __NR_flock 32=0A= +#define __NR_mknodat 33=0A= +#define __NR_mkdirat 34=0A= +#define __NR_unlinkat 35=0A= +#define __NR_symlinkat 36=0A= +#define __NR_linkat 37=0A= +#define __NR_renameat 38=0A= +#define __NR_umount2 39=0A= +#define __NR_mount 40=0A= +#define __NR_pivot_root 41=0A= +#define __NR_nfsservctl 42=0A= +#define __NR3264_statfs 43=0A= +#define __NR3264_fstatfs 44=0A= +#define __NR3264_truncate 45=0A= +#define __NR3264_ftruncate 46=0A= +#define __NR_fallocate 47=0A= +#define __NR_faccessat 48=0A= +#define __NR_chdir 49=0A= +#define __NR_fchdir 50=0A= +#define __NR_chroot 51=0A= +#define __NR_fchmod 52=0A= +#define __NR_fchmodat 53=0A= +#define __NR_fchownat 54=0A= +#define __NR_fchown 55=0A= +#define __NR_openat 56=0A= +#define __NR_close 57=0A= +#define __NR_vhangup 58=0A= +#define __NR_pipe2 59=0A= +#define __NR_quotactl 60=0A= +#define __NR_getdents64 61=0A= +#define __NR3264_lseek 62=0A= +#define __NR_read 63=0A= +#define __NR_write 64=0A= +#define __NR_readv 65=0A= +#define __NR_writev 66=0A= +#define __NR_pread64 67=0A= +#define __NR_pwrite64 68=0A= +#define __NR_preadv 69=0A= +#define __NR_pwritev 70=0A= +#define __NR3264_sendfile 71=0A= +#define __NR_pselect6 72=0A= +#define __NR_ppoll 73=0A= +#define __NR_signalfd4 74=0A= +#define __NR_vmsplice 75=0A= +#define __NR_splice 76=0A= +#define __NR_tee 77=0A= +#define __NR_readlinkat 78=0A= +#define __NR3264_fstatat 79=0A= +#define __NR3264_fstat 80=0A= +#define __NR_sync 81=0A= +#define __NR_fsync 82=0A= +#define __NR_fdatasync 83=0A= +#define __NR_sync_file_range2 84=0A= +#define __NR_sync_file_range 84=0A= +#define __NR_timerfd_create 85=0A= +#define __NR_timerfd_settime 86=0A= +#define __NR_timerfd_gettime 87=0A= +#define __NR_utimensat 88=0A= +#define __NR_acct 89=0A= +#define __NR_capget 90=0A= +#define __NR_capset 91=0A= +#define __NR_personality 92=0A= +#define __NR_exit 93=0A= +#define __NR_exit_group 94=0A= +#define __NR_waitid 95=0A= +#define __NR_set_tid_address 96=0A= +#define __NR_unshare 97=0A= +#define __NR_futex 98=0A= +#define __NR_set_robust_list 99=0A= +#define __NR_get_robust_list 100=0A= +#define __NR_nanosleep 101=0A= +#define __NR_getitimer 102=0A= +#define __NR_setitimer 103=0A= +#define __NR_kexec_load 104=0A= +#define __NR_init_module 105=0A= +#define __NR_delete_module 106=0A= +#define __NR_timer_create 107=0A= +#define __NR_timer_gettime 108=0A= +#define __NR_timer_getoverrun 109=0A= +#define __NR_timer_settime 110=0A= +#define __NR_timer_delete 111=0A= +#define __NR_clock_settime 112=0A= +#define __NR_clock_gettime 113=0A= +#define __NR_clock_getres 114=0A= +#define __NR_clock_nanosleep 115=0A= +#define __NR_syslog 116=0A= +#define __NR_ptrace 117=0A= +#define __NR_sched_setparam 118=0A= +#define __NR_sched_setscheduler 119=0A= +#define __NR_sched_getscheduler 120=0A= +#define __NR_sched_getparam 121=0A= +#define __NR_sched_setaffinity 122=0A= +#define __NR_sched_getaffinity 123=0A= +#define __NR_sched_yield 124=0A= +#define __NR_sched_get_priority_max 125=0A= +#define __NR_sched_get_priority_min 126=0A= +#define __NR_sched_rr_get_interval 127=0A= +#define __NR_restart_syscall 128=0A= +#define __NR_kill 129=0A= +#define __NR_tkill 130=0A= +#define __NR_tgkill 131=0A= +#define __NR_sigaltstack 132=0A= +#define __NR_rt_sigsuspend 133=0A= +#define __NR_rt_sigaction 134=0A= +#define __NR_rt_sigprocmask 135=0A= +#define __NR_rt_sigpending 136=0A= +#define __NR_rt_sigtimedwait 137=0A= +#define __NR_rt_sigqueueinfo 138=0A= +#define __NR_rt_sigreturn 139=0A= +#define __NR_setpriority 140=0A= +#define __NR_getpriority 141=0A= +#define __NR_reboot 142=0A= +#define __NR_setregid 143=0A= +#define __NR_setgid 144=0A= +#define __NR_setreuid 145=0A= +#define __NR_setuid 146=0A= +#define __NR_setresuid 147=0A= +#define __NR_getresuid 148=0A= +#define __NR_setresgid 149=0A= +#define __NR_getresgid 150=0A= +#define __NR_setfsuid 151=0A= +#define __NR_setfsgid 152=0A= +#define __NR_times 153=0A= +#define __NR_setpgid 154=0A= +#define __NR_getpgid 155=0A= +#define __NR_getsid 156=0A= +#define __NR_setsid 157=0A= +#define __NR_getgroups 158=0A= +#define __NR_setgroups 159=0A= +#define __NR_uname 160=0A= +#define __NR_sethostname 161=0A= +#define __NR_setdomainname 162=0A= +#define __NR_getrlimit 163=0A= +#define __NR_setrlimit 164=0A= +#define __NR_getrusage 165=0A= +#define __NR_umask 166=0A= +#define __NR_prctl 167=0A= +#define __NR_getcpu 168=0A= +#define __NR_gettimeofday 169=0A= +#define __NR_settimeofday 170=0A= +#define __NR_adjtimex 171=0A= +#define __NR_getpid 172=0A= +#define __NR_getppid 173=0A= +#define __NR_getuid 174=0A= +#define __NR_geteuid 175=0A= +#define __NR_getgid 176=0A= +#define __NR_getegid 177=0A= +#define __NR_gettid 178=0A= +#define __NR_sysinfo 179=0A= +#define __NR_mq_open 180=0A= +#define __NR_mq_unlink 181=0A= +#define __NR_mq_timedsend 182=0A= +#define __NR_mq_timedreceive 183=0A= +#define __NR_mq_notify 184=0A= +#define __NR_mq_getsetattr 185=0A= +#define __NR_msgget 186=0A= +#define __NR_msgctl 187=0A= +#define __NR_msgrcv 188=0A= +#define __NR_msgsnd 189=0A= +#define __NR_semget 190=0A= +#define __NR_semctl 191=0A= +#define __NR_semtimedop 192=0A= +#define __NR_semop 193=0A= +#define __NR_shmget 194=0A= +#define __NR_shmctl 195=0A= +#define __NR_shmat 196=0A= +#define __NR_shmdt 197=0A= +#define __NR_socket 198=0A= +#define __NR_socketpair 199=0A= +#define __NR_bind 200=0A= +#define __NR_listen 201=0A= +#define __NR_accept 202=0A= +#define __NR_connect 203=0A= +#define __NR_getsockname 204=0A= +#define __NR_getpeername 205=0A= +#define __NR_sendto 206=0A= +#define __NR_recvfrom 207=0A= +#define __NR_setsockopt 208=0A= +#define __NR_getsockopt 209=0A= +#define __NR_shutdown 210=0A= +#define __NR_sendmsg 211=0A= +#define __NR_recvmsg 212=0A= +#define __NR_readahead 213=0A= +#define __NR_brk 214=0A= +#define __NR_munmap 215=0A= +#define __NR_mremap 216=0A= +#define __NR_add_key 217=0A= +#define __NR_request_key 218=0A= +#define __NR_keyctl 219=0A= +#define __NR_clone 220=0A= +#define __NR_execve 221=0A= +#define __NR3264_mmap 222=0A= +#define __NR3264_fadvise64 223=0A= +#define __NR_swapon 224=0A= +#define __NR_swapoff 225=0A= +#define __NR_mprotect 226=0A= +#define __NR_msync 227=0A= +#define __NR_mlock 228=0A= +#define __NR_munlock 229=0A= +#define __NR_mlockall 230=0A= +#define __NR_munlockall 231=0A= +#define __NR_mincore 232=0A= +#define __NR_madvise 233=0A= +#define __NR_remap_file_pages 234=0A= +#define __NR_mbind 235=0A= +#define __NR_get_mempolicy 236=0A= +#define __NR_set_mempolicy 237=0A= +#define __NR_migrate_pages 238=0A= +#define __NR_move_pages 239=0A= +#define __NR_rt_tgsigqueueinfo 240=0A= +#define __NR_perf_event_open 241=0A= +#define __NR_accept4 242=0A= +#define __NR_recvmmsg 243=0A= +#define __NR_arch_specific_syscall 244=0A= +#define __NR_wait4 260=0A= +#define __NR_prlimit64 261=0A= +#define __NR_fanotify_init 262=0A= +#define __NR_fanotify_mark 263=0A= +#define __NR_name_to_handle_at 264=0A= +#define __NR_open_by_handle_at 265=0A= +#define __NR_clock_adjtime 266=0A= +#define __NR_syncfs 267=0A= +#define __NR_setns 268=0A= +#define __NR_sendmmsg 269=0A= +#define __NR_process_vm_readv 270=0A= +#define __NR_process_vm_writev 271=0A= +#define __NR_kcmp 272=0A= +#define __NR_finit_module 273=0A= +#define __NR_sched_setattr 274=0A= +#define __NR_sched_getattr 275=0A= +#define __NR_renameat2 276=0A= +#define __NR_seccomp 277=0A= +#define __NR_getrandom 278=0A= +#define __NR_memfd_create 279=0A= +#define __NR_bpf 280=0A= +#define __NR_execveat 281=0A= +#define __NR_userfaultfd 282=0A= +#define __NR_membarrier 283=0A= +#define __NR_mlock2 284=0A= +#define __NR_copy_file_range 285=0A= +#define __NR_preadv2 286=0A= +#define __NR_pwritev2 287=0A= +#define __NR_pkey_mprotect 288=0A= +#define __NR_pkey_alloc 289=0A= +#define __NR_pkey_free 290=0A= +#define __NR_statx 291=0A= +#define __NR_syscalls (__NR_statx+1)=0A= +#define __NR_fcntl __NR3264_fcntl=0A= +#define __NR_fstatfs __NR3264_fstatfs=0A= +#define __NR_truncate __NR3264_truncate=0A= +#define __NR_ftruncate __NR3264_ftruncate=0A= +#define __NR_lseek __NR3264_lseek=0A= +#define __NR_sendfile __NR3264_sendfile=0A= +#define __NR_newfstatat __NR3264_fstatat=0A= +#define __NR_fcntl64 __NR3264_fcntl=0A= +#define __NR_statfs64 __NR3264_statfs=0A= +#define __NR_fstatfs64 __NR3264_fstatfs=0A= +#define __NR_truncate64 __NR3264_truncate=0A= +#define __NR_ftruncate64 __NR3264_ftruncate=0A= +#define __NR__llseek __NR3264_lseek=0A= +#define __NR_sendfile64 __NR3264_sendfile=0A= +#define __NR_fstatat64 __NR3264_fstatat=0A= +#define __NR_fstat64 __NR3264_fstat=0A= +#define __NR_mmap2 __NR3264_mmap=0A= +#define __NR_fadvise64_64 __NR3264_fadvise64=0A= diff --git a/arch/hexagon/crt_arch.h b/arch/hexagon/crt_arch.h=0A= new file mode 100644=0A= index 00000000..331a797e=0A= --- /dev/null=0A= +++ b/arch/hexagon/crt_arch.h=0A= @@ -0,0 +1,35 @@=0A= +__asm__(=0A= +".weak _DYNAMIC \n"=0A= +".hidden _DYNAMIC \n"=0A= +".text \n"=0A= +".global " START " \n"=0A= +".type " START ", %function \n"=0A= +START ": \n"=0A= +" // Find _DYNAMIC\n"=0A= +" jump 1f\n"=0A= +".word _DYNAMIC - .\n"=0A= +"1: r2 =3D pc\n"=0A= +" r2 =3D add(r2, #-4)\n"=0A= +" r1 =3D memw(r2)\n"=0A= +" r1 =3D add(r2, r1)\n"=0A= +" r30 =3D #0 // Signals the end of backtrace\n"=0A= +" r0 =3D r29 // Pointer to argc/argv\n"=0A= +" r29 =3D and(r29, #-16) // Align\n"=0A= +" memw(r29+#-8) =3D r29\n"=0A= +" r29 =3D add(r29, #-8)\n"=0A= +" call " START "_c \n"=0A= +".size " START ", .-" START "\n"=0A= +);=0A= +=0A= +__asm__(=0A= +".section \".note.ABI-tag\", \"a\" \n"=0A= +".align 4 \n"=0A= +".long 1f - 0f /* name length */ \n"=0A= +".long 3f - 2f /* data length */ \n"=0A= +".long 1 /* note type */ \n"=0A= +"0: .asciz \"GNU\" /* vendor name seems like this should be MUSL but = lldb doesn't agree.*/ \n"=0A= +"1: .align 4 \n"=0A= +"2: .long 0 /* linux */ \n"=0A= +" .long 3,0,0 \n"=0A= +"3: .align 4 \n"=0A= +);=0A= diff --git a/arch/hexagon/kstat.h b/arch/hexagon/kstat.h=0A= new file mode 100644=0A= index 00000000..92625f36=0A= --- /dev/null=0A= +++ b/arch/hexagon/kstat.h=0A= @@ -0,0 +1,21 @@=0A= +struct kstat {=0A= + dev_t st_dev;=0A= + ino_t st_ino;=0A= + mode_t st_mode;=0A= + nlink_t st_nlink;=0A= + uid_t st_uid;=0A= + gid_t st_gid;=0A= + dev_t st_rdev;=0A= + unsigned long __pad;=0A= + off_t st_size;=0A= + blksize_t st_blksize;=0A= + int __pad2;=0A= + blkcnt_t st_blocks;=0A= + long st_atime_sec;=0A= + long st_atime_nsec;=0A= + long st_mtime_sec;=0A= + long st_mtime_nsec;=0A= + long st_ctime_sec;=0A= + long st_ctime_nsec;=0A= + unsigned __unused[2];=0A= +};=0A= diff --git a/arch/hexagon/pthread_arch.h b/arch/hexagon/pthread_arch.h=0A= new file mode 100644=0A= index 00000000..b1344dc1=0A= --- /dev/null=0A= +++ b/arch/hexagon/pthread_arch.h=0A= @@ -0,0 +1,14 @@=0A= +=0A= +// Hexagon supports variant 2 TLS.=0A= +static inline struct pthread *__pthread_self()=0A= +{=0A= + struct pthread *tp;=0A= + __asm__ ( "%0 =3D ugp" : "=3Dr"(tp));=0A= + return tp;=0A= +}=0A= +=0A= +#define TP_ADJ(p) (p)=0A= +=0A= +#define CANCEL_REG_IP 43=0A= +=0A= +#define MC_PC pc=0A= diff --git a/arch/hexagon/reloc.h b/arch/hexagon/reloc.h=0A= new file mode 100644=0A= index 00000000..14085872=0A= --- /dev/null=0A= +++ b/arch/hexagon/reloc.h=0A= @@ -0,0 +1,25 @@=0A= +#include =0A= +=0A= +#if __BYTE_ORDER =3D=3D __LITTLE_ENDIAN=0A= +#define ENDIAN_SUFFIX "el"=0A= +#else=0A= +#define ENDIAN_SUFFIX ""=0A= +#endif=0A= +=0A= +#define FP_SUFFIX ""=0A= +=0A= +#define LDSO_ARCH "hexagon" ENDIAN_SUFFIX FP_SUFFIX=0A= +=0A= +#define TPOFF_K 0=0A= +=0A= +#define REL_SYMBOLIC R_HEX_32=0A= +#define REL_GOT R_HEX_GLOB_DAT=0A= +#define REL_PLT R_HEX_JMP_SLOT=0A= +#define REL_RELATIVE R_HEX_RELATIVE=0A= +#define REL_COPY R_HEX_COPY=0A= +#define REL_DTPMOD R_HEX_DTPMOD_32=0A= +#define REL_TPOFF R_HEX_TPREL_32=0A= +#define REL_DTPOFF R_HEX_DTPREL_32=0A= +=0A= +#define CRTJMP(pc,sp) __asm__ __volatile__( \=0A= + "r29 =3D %1 ; jumpr %0" : : "r"(pc), "r"(sp) : "memory" )=0A= diff --git a/arch/hexagon/syscall_arch.h b/arch/hexagon/syscall_arch.h=0A= new file mode 100644=0A= index 00000000..e6defe41=0A= --- /dev/null=0A= +++ b/arch/hexagon/syscall_arch.h=0A= @@ -0,0 +1,77 @@=0A= +=0A= +#define __SYSCALL_LL_E(x) \=0A= +((union { long long ll; long l[2]; }){ .ll =3D x }).l[0], \=0A= +((union { long long ll; long l[2]; }){ .ll =3D x }).l[1]=0A= +#define __SYSCALL_LL_O(x) 0, __SYSCALL_LL_E((x))=0A= +=0A= +#define __asm_syscall(...) do { \=0A= + __asm__ __volatile__ ( "trap0(#1)" \=0A= + : "=3Dr"(r0) : __VA_ARGS__ : "memory"); \=0A= + return r0; \=0A= + } while (0)=0A= +=0A= +static inline long __syscall0(long n)=0A= +{=0A= + register long r6 __asm__("r6") =3D n;=0A= + register long r0 __asm__("r0");=0A= + __asm_syscall("r"(r6));=0A= +}=0A= +=0A= +static inline long __syscall1(long n, long a)=0A= +{=0A= + register long r6 __asm__("r6") =3D n;=0A= + register long r0 __asm__("r0") =3D a;=0A= + __asm_syscall("r"(r6), "0"(r0));=0A= +}=0A= +=0A= +static inline long __syscall2(long n, long a, long b)=0A= +{=0A= + register long r6 __asm__("r6") =3D n;=0A= + register long r0 __asm__("r0") =3D a;=0A= + register long r1 __asm__("r1") =3D b;=0A= + __asm_syscall("r"(r6), "0"(r0), "r"(r1));=0A= +}=0A= +=0A= +static inline long __syscall3(long n, long a, long b, long c)=0A= +{=0A= + register long r6 __asm__("r6") =3D n;=0A= + register long r0 __asm__("r0") =3D a;=0A= + register long r1 __asm__("r1") =3D b;=0A= + register long r2 __asm__("r2") =3D c;=0A= + __asm_syscall("r"(r6), "0"(r0), "r"(r1), "r"(r2));=0A= +}=0A= +=0A= +static inline long __syscall4(long n, long a, long b, long c, long d)=0A= +{=0A= + register long r6 __asm__("r6") =3D n;=0A= + register long r0 __asm__("r0") =3D a;=0A= + register long r1 __asm__("r1") =3D b;=0A= + register long r2 __asm__("r2") =3D c;=0A= + register long r3 __asm__("r3") =3D d;=0A= + __asm_syscall("r"(r6), "0"(r0), "r"(r1), "r"(r2), "r"(r3));=0A= +}=0A= +=0A= +static inline long __syscall5(long n, long a, long b, long c, long d, = long e)=0A= +{=0A= + register long r6 __asm__("r6") =3D n;=0A= + register long r0 __asm__("r0") =3D a;=0A= + register long r1 __asm__("r1") =3D b;=0A= + register long r2 __asm__("r2") =3D c;=0A= + register long r3 __asm__("r3") =3D d;=0A= + register long r4 __asm__("r4") =3D e;=0A= + __asm_syscall("r"(r6), "0"(r0), "r"(r1), "r"(r2), "r"(r3), "r"(r4));=0A= +}=0A= +=0A= +static inline long __syscall6(long n, long a, long b, long c, long d, = long e, long f)=0A= +{=0A= + register long r6 __asm__("r6") =3D n;=0A= + register long r0 __asm__("r0") =3D a;=0A= + register long r1 __asm__("r1") =3D b;=0A= + register long r2 __asm__("r2") =3D c;=0A= + register long r3 __asm__("r3") =3D d;=0A= + register long r4 __asm__("r4") =3D e;=0A= + register long r5 __asm__("r5") =3D f;=0A= + __asm_syscall("r"(r6), "0"(r0), "r"(r1), "r"(r2), "r"(r3), "r"(r4), = "r"(r5));=0A= +}=0A= +=0A= +#define SYSCALL_FADVISE_6_ARG=0A= diff --git a/configure b/configure=0A= index a2728969..344835ae 100755=0A= --- a/configure=0A= +++ b/configure=0A= @@ -312,6 +312,7 @@ case "$target" in=0A= # Catch these early to simplify matching for 32-bit archs=0A= arm*) ARCH=3Darm ;;=0A= aarch64*) ARCH=3Daarch64 ;;=0A= +hexagon*) ARCH=3Dhexagon ;;=0A= i?86-nt32*) ARCH=3Dnt32 ;;=0A= i?86*) ARCH=3Di386 ;;=0A= x86_64-x32*|x32*|x86_64*x32) ARCH=3Dx32 ;;=0A= diff --git a/include/elf.h b/include/elf.h=0A= index 549f92c1..54251c24 100644=0A= --- a/include/elf.h=0A= +++ b/include/elf.h=0A= @@ -3284,6 +3284,107 @@ enum=0A= #define R_RISCV_SET32 56=0A= #define R_RISCV_32_PCREL 57=0A= =0A= +#define R_HEX_NONE 0=0A= +#define R_HEX_B22_PCREL 1=0A= +#define R_HEX_B15_PCREL 2=0A= +#define R_HEX_B7_PCREL 3=0A= +#define R_HEX_LO16 4=0A= +#define R_HEX_HI16 5=0A= +#define R_HEX_32 6=0A= +#define R_HEX_16 7=0A= +#define R_HEX_8 8=0A= +#define R_HEX_GPREL16_0 9=0A= +#define R_HEX_GPREL16_1 10=0A= +#define R_HEX_GPREL16_2 11=0A= +#define R_HEX_GPREL16_3 12=0A= +#define R_HEX_HL16 13=0A= +#define R_HEX_B13_PCREL 14=0A= +#define R_HEX_B9_PCREL 15=0A= +#define R_HEX_B32_PCREL_X 16=0A= +#define R_HEX_32_6_X 17=0A= +#define R_HEX_B22_PCREL_X 18=0A= +#define R_HEX_B15_PCREL_X 19=0A= +#define R_HEX_B13_PCREL_X 20=0A= +#define R_HEX_B9_PCREL_X 21=0A= +#define R_HEX_B7_PCREL_X 22=0A= +#define R_HEX_16_X 23=0A= +#define R_HEX_12_X 24=0A= +#define R_HEX_11_X 25=0A= +#define R_HEX_10_X 26=0A= +#define R_HEX_9_X 27=0A= +#define R_HEX_8_X 28=0A= +#define R_HEX_7_X 29=0A= +#define R_HEX_6_X 30=0A= +#define R_HEX_32_PCREL 31=0A= +#define R_HEX_COPY 32=0A= +#define R_HEX_GLOB_DAT 33=0A= +#define R_HEX_JMP_SLOT 34=0A= +#define R_HEX_RELATIVE 35=0A= +#define R_HEX_PLT_B22_PCREL 36=0A= +#define R_HEX_GOTOFF_LO16 37=0A= +#define R_HEX_GOTOFF_HI16 38=0A= +#define R_HEX_GOTOFF_32 39=0A= +#define R_HEX_GOT_LO16 40=0A= +#define R_HEX_GOT_HI16 41=0A= +#define R_HEX_GOT_32 42=0A= +#define R_HEX_GOT_16 43=0A= +#define R_HEX_DTPMOD_32 44=0A= +#define R_HEX_DTPREL_LO16 45=0A= +#define R_HEX_DTPREL_HI16 46=0A= +#define R_HEX_DTPREL_32 47=0A= +#define R_HEX_DTPREL_16 48=0A= +#define R_HEX_GD_PLT_B22_PCREL 49=0A= +#define R_HEX_GD_GOT_LO16 50=0A= +#define R_HEX_GD_GOT_HI16 51=0A= +#define R_HEX_GD_GOT_32 52=0A= +#define R_HEX_GD_GOT_16 53=0A= +#define R_HEX_IE_LO16 54=0A= +#define R_HEX_IE_HI16 55=0A= +#define R_HEX_IE_32 56=0A= +#define R_HEX_IE_GOT_LO16 57=0A= +#define R_HEX_IE_GOT_HI16 58=0A= +#define R_HEX_IE_GOT_32 59=0A= +#define R_HEX_IE_GOT_16 60=0A= +#define R_HEX_TPREL_LO16 61=0A= +#define R_HEX_TPREL_HI16 62=0A= +#define R_HEX_TPREL_32 63=0A= +#define R_HEX_TPREL_16 64=0A= +#define R_HEX_6_PCREL_X 65=0A= +#define R_HEX_GOTREL_32_6_X 66=0A= +#define R_HEX_GOTREL_16_X 67=0A= +#define R_HEX_GOTREL_11_X 68=0A= +#define R_HEX_GOT_32_6_X 69=0A= +#define R_HEX_GOT_16_X 70=0A= +#define R_HEX_GOT_11_X 71=0A= +#define R_HEX_DTPREL_32_6_X 72=0A= +#define R_HEX_DTPREL_16_X 73=0A= +#define R_HEX_DTPREL_11_X 74=0A= +#define R_HEX_GD_GOT_32_6_X 75=0A= +#define R_HEX_GD_GOT_16_X 76=0A= +#define R_HEX_GD_GOT_11_X 77=0A= +#define R_HEX_IE_32_6_X 78=0A= +#define R_HEX_IE_16_X 79=0A= +#define R_HEX_IE_GOT_32_6_X 80=0A= +#define R_HEX_IE_GOT_16_X 81=0A= +#define R_HEX_IE_GOT_11_X 82=0A= +#define R_HEX_TPREL_32_6_X 83=0A= +#define R_HEX_TPREL_16_X 84=0A= +#define R_HEX_TPREL_11_X 85=0A= +#define R_HEX_LD_PLT_B22_PCREL 86=0A= +#define R_HEX_LD_GOT_LO16 87=0A= +#define R_HEX_LD_GOT_HI16 88=0A= +#define R_HEX_LD_GOT_32 89=0A= +#define R_HEX_LD_GOT_16 90=0A= +#define R_HEX_LD_GOT_32_6_X 91=0A= +#define R_HEX_LD_GOT_16_X 92=0A= +#define R_HEX_LD_GOT_11_X 93=0A= +#define R_HEX_23_REG 94=0A= +#define R_HEX_GD_PLT_B22_PCREL_X 95=0A= +#define R_HEX_GD_PLT_B32_PCREL_X 96=0A= +#define R_HEX_LD_PLT_B22_PCREL_X 97=0A= +#define R_HEX_LD_PLT_B32_PCREL_X 98=0A= +=0A= +=0A= #ifdef __cplusplus=0A= }=0A= #endif=0A= diff --git a/src/fenv/hexagon/fenv.S b/src/fenv/hexagon/fenv.S=0A= new file mode 100644=0A= index 00000000..07b89764=0A= --- /dev/null=0A= +++ b/src/fenv/hexagon/fenv.S=0A= @@ -0,0 +1,143 @@=0A= +/*=0A= +The Hexagon user status register includes five status fields which work = as=0A= +sticky flags for the five IEEE-defined exception conditions: inexact, = overflow, underflow,=0A= +divide by zero, and invalid. A sticky flag is set when the = corresponding exception occurs,=0A= +and remains set until explicitly cleared.=0A= +=0A= + usr:23:22 - Rounding Mode=0A= + 00: Round toward nearest=0A= + 01: Round toward zero=0A= + 10: Downward Round toward negative infinity=0A= + 11: Upward Round toward positive infinity=0A= +=0A= + usr:5 - Floating-point IEEE Inexact Sticky Flag.=0A= + usr:4 - Floating-point IEEE Underflow Sticky Flag.=0A= + usr:3 - Floating-point IEEE Overflow Sticky Flag.=0A= + usr:2 - Floating-point IEEE Divide-By-Zero Sticky Flag.=0A= + usr:1 - Floating-point IEEE Invalid Sticky Flag.=0A= + usr:0 - Sticky Saturation Overflow, when 1 saturation occurred.=0A= +*/=0A= +=0A= +#define FE_ALL_EXCEPT 0x3f=0A= +=0A= +#define USR_FE_MASK 0x3fc0003f=0A= +#define RND_MASK (0x3 << 22)=0A= +#define RND_NEAR (0x0 << 22)=0A= +#define RND_ZERO (0x1 << 22)=0A= +#define RND_DOWN (0x2 << 22)=0A= +#define RND_UP (0x3 << 22)=0A= +=0A= +/*=0A= +int feclearexcept(int mask)=0A= +*/=0A= +.global feclearexcept=0A= +.type feclearexcept,@function=0A= +feclearexcept:=0A= + {=0A= + r0 =3D and(r0, #FE_ALL_EXCEPT) // Only touch the IEEE flag bits.=0A= + r1 =3D usr=0A= + }=0A= + r1 =3D and(r1, ~r0)=0A= + {=0A= + usr =3D r1=0A= + r0 =3D #0=0A= + jumpr r31=0A= + }=0A= +=0A= +/*=0A= +int feraiseexcept(int mask)=0A= +*/=0A= +.global feraiseexcept=0A= +.type feraiseexcept,@function=0A= +feraiseexcept:=0A= + {=0A= + r0 =3D and(r0, #FE_ALL_EXCEPT) // Only touch the IEEE flag bits.=0A= + r1 =3D usr=0A= + }=0A= + r1 =3D or(r1, r0)=0A= + {=0A= + usr =3D r1=0A= + r0 =3D #0=0A= + jumpr r31=0A= + }=0A= +=0A= +=0A= +/*=0A= +int fetestexcept(int mask)=0A= +*/=0A= +.global fetestexcept=0A= +.type fetestexcept,@function=0A= +fetestexcept:=0A= + {=0A= + r0 =3D and(r0, #FE_ALL_EXCEPT) // Only touch the IEEE flag bits.=0A= + r1 =3D usr=0A= + }=0A= + {=0A= + r0 =3D and(r1, r0)=0A= + jumpr r31=0A= + }=0A= +=0A= +/*=0A= +int fegetround(void)=0A= +*/=0A= +.global fegetround=0A= +.type fegetround,@function=0A= +fegetround:=0A= + r0 =3D usr=0A= + r0 =3D and(r0, ##RND_MASK)=0A= + r0 =3D lsr(r0, #22);=0A= + jumpr r31=0A= +=0A= +/*=0A= +int __fesetround(int r)=0A= +*/=0A= +.global __fesetround=0A= +.type __fesetround,@function=0A= +__fesetround:=0A= + {=0A= + r0 =3D and(r0, #0x3) // Can only be 0,1,2, or 3=0A= + r1 =3D usr=0A= + r2 =3D ##RND_MASK=0A= + }=0A= + {=0A= + r1 =3D and (r1, ~r2) // Clear the current rounding bits.=0A= + r0 =3D asl (r0, #22)=0A= + }=0A= + r1 =3D or(r1, r0)=0A= + usr =3D r1=0A= + {=0A= + r0 =3D #0; jumpr r31=0A= + }=0A= +=0A= +/*=0A= +int fegetenv(fenv_t *envp)=0A= +*/=0A= +.global fegetenv=0A= +.type fegetenv,@function=0A= +fegetenv:=0A= + r1 =3D usr=0A= + memw(r0) =3D r1=0A= + {=0A= + r0 =3D #0=0A= + jumpr r31=0A= + }=0A= +=0A= +/*=0A= +int fesetenv(const fenv_t *envp)=0A= +*/=0A= +.global fesetenv=0A= +.type fesetenv,@function=0A= +fesetenv:=0A= + { p0 =3D cmp.eq(r0, #-1); if (p0.new) r1 =3D #0 } /* The default = mode */=0A= + if (!p0) r1 =3D memw(r0) /* stored in fenv_t = */=0A= +=0A= + r2 =3D ##USR_FE_MASK // USR:FE bit mask=0A= + r1 =3D and(r1, r2) // MASK the input bits with the FE bits=0A= + r3 =3D usr=0A= + r3 =3D and(r3, ~r2) // Clear any currently set FE bits=0A= + r3 =3D or(r3, r1) // Set the newbits=0A= + usr =3D r3=0A= + {=0A= + r0 =3D #0=0A= + jumpr r31=0A= + }=0A= diff --git a/src/setjmp/hexagon/longjmp.s b/src/setjmp/hexagon/longjmp.s=0A= new file mode 100644=0A= index 00000000..691b67dd=0A= --- /dev/null=0A= +++ b/src/setjmp/hexagon/longjmp.s=0A= @@ -0,0 +1,25 @@=0A= +.text=0A= +.global _longjmp=0A= +.global longjmp=0A= +.type _longjmp,%function=0A= +.type longjmp,%function=0A= +_longjmp:=0A= +longjmp:=0A= + { r17:16=3Dmemd(r0+#0)=0A= + r19:18=3Dmemd(r0+#8) }=0A= + { r21:20=3Dmemd(r0+#16)=0A= + r23:22=3Dmemd(r0+#24) }=0A= + { r25:24=3Dmemd(r0+#32)=0A= + r27:26=3Dmemd(r0+#40) }=0A= + { r29:28=3Dmemd(r0+#48)=0A= + r31:30=3Dmemd(r0+#56) }=0A= +=0A= + r0 =3D r1=0A= + r1 =3D #0=0A= + p0 =3D cmp.eq(r0,r1)=0A= + if (!p0) jumpr r31=0A= + r0 =3D #1=0A= +=0A= + jumpr r31=0A= +.size _longjmp, .-_longjmp=0A= +.size longjmp, .-longjmp=0A= diff --git a/src/setjmp/hexagon/setjmp.s b/src/setjmp/hexagon/setjmp.s=0A= new file mode 100644=0A= index 00000000..d29f036e=0A= --- /dev/null=0A= +++ b/src/setjmp/hexagon/setjmp.s=0A= @@ -0,0 +1,24 @@=0A= +.text=0A= +.global __setjmp=0A= +.global _setjmp=0A= +.global setjmp=0A= +.type __setjmp,@function=0A= +.type _setjmp,@function=0A= +.type setjmp,@function=0A= +__setjmp:=0A= +_setjmp:=0A= +setjmp:=0A= + { memd(r0+#0)=3Dr17:16=0A= + memd(r0+#8)=3Dr19:18 }=0A= + { memd(r0+#16)=3Dr21:20=0A= + memd(r0+#24)=3Dr23:22 }=0A= + { memd(r0+#32)=3Dr25:24=0A= + memd(r0+#40)=3Dr27:26 }=0A= + { memd(r0+#48)=3Dr29:28=0A= + memd(r0+#56)=3Dr31:30 }=0A= +=0A= + r0 =3D #0=0A= + jumpr r31=0A= +.size __setjmp, .-__setjmp=0A= +.size _setjmp, .-_setjmp=0A= +.size setjmp, .-setjmp=0A= diff --git a/src/signal/hexagon/restore.s b/src/signal/hexagon/restore.s=0A= new file mode 100644=0A= index 00000000..f43f5e02=0A= --- /dev/null=0A= +++ b/src/signal/hexagon/restore.s=0A= @@ -0,0 +1,11 @@=0A= +// TODO - Test this if sa_restorer is ever supported in our kernel=0A= +.global __restore=0A= +.type __restore,%function=0A= +.global __restore_rt=0A= +.type __restore_rt,%function=0A= +__restore:=0A= +__restore_rt:=0A= + r6 =3D #139 // SYS_rt_sigreturn=0A= + trap0(#0)=0A= +.size __restore, .-__restore=0A= +.size __restore_rt, .-__restore_rt=0A= diff --git a/src/signal/hexagon/siglongjmp.c = b/src/signal/hexagon/siglongjmp.c=0A= new file mode 100644=0A= index 00000000..d9d52abd=0A= --- /dev/null=0A= +++ b/src/signal/hexagon/siglongjmp.c=0A= @@ -0,0 +1,15 @@=0A= +#include =0A= +#include =0A= +#include "syscall.h"=0A= +#include "pthread_impl.h"=0A= +=0A= +_Noreturn void siglongjmp(sigjmp_buf buf, int ret)=0A= +{=0A= +#if defined (__hexagon__)=0A= + // TODO - The following two lines were added=0A= + // Figure out why they weren't in the original source=0A= + if (buf->__fl)=0A= + pthread_sigmask(SIG_SETMASK, (sigset_t *)buf->__ss, NULL);=0A= +#endif=0A= + longjmp(buf, ret);=0A= +}=0A= diff --git a/src/signal/hexagon/sigsetjmp.s = b/src/signal/hexagon/sigsetjmp.s=0A= new file mode 100644=0A= index 00000000..3afac01f=0A= --- /dev/null=0A= +++ b/src/signal/hexagon/sigsetjmp.s=0A= @@ -0,0 +1,34 @@=0A= + .text=0A= + .globl sigsetjmp=0A= + .balign 4=0A= + .type sigsetjmp,@function=0A= +sigsetjmp:=0A= + {=0A= + p0 =3D cmp.eq(r1, #0)=0A= + r16 =3D r0=0A= + memd(r29 + #-16) =3D r17:16=0A= + allocframe(#8)=0A= + }=0A= + {=0A= + if (p0) jump 1f=0A= + if (!p0) r2 =3D add(r16, #68)=0A= + memw(r16+#64) =3D r1=0A= + }=0A= + {=0A= + call pthread_sigmask=0A= + r1:0 =3D combine(#0, #2)=0A= + }=0A= +1:=0A= + {=0A= + r0 =3D r16=0A= + r17:16 =3D memd(r29 + #0)=0A= + deallocframe=0A= + }=0A= + {=0A= + jump setjmp=0A= + }=0A= + .size sigsetjmp, .-sigsetjmp=0A= +=0A= +=0A= +.weak __sigsetjmp=0A= +.set __sigsetjmp, sigsetjmp=0A= diff --git a/src/thread/hexagon/__set_thread_area.s = b/src/thread/hexagon/__set_thread_area.s=0A= new file mode 100644=0A= index 00000000..87a991b7=0A= --- /dev/null=0A= +++ b/src/thread/hexagon/__set_thread_area.s=0A= @@ -0,0 +1,7 @@=0A= +.global __set_thread_area=0A= +.type __set_thread_area,@function=0A= +__set_thread_area:=0A= + { ugp =3D r0=0A= + r0 =3D #0=0A= + jumpr r31 }=0A= +.size __set_thread_area, .-__set_thread_area=0A= diff --git a/src/thread/hexagon/__unmapself.s = b/src/thread/hexagon/__unmapself.s=0A= new file mode 100644=0A= index 00000000..c47dce21=0A= --- /dev/null=0A= +++ b/src/thread/hexagon/__unmapself.s=0A= @@ -0,0 +1,11 @@=0A= +#include =0A= +=0A= +.global __unmapself=0A= +.type __unmapself,%function=0A= +__unmapself:=0A= + r6 =3D #215 // SYS_munmap=0A= + trap0(#1)=0A= + r6 =3D #93 // SYS_exit=0A= + trap0(#1)=0A= + jumpr r31=0A= +.size __unmapself, .-__unmapself=0A= diff --git a/src/thread/hexagon/clone.s b/src/thread/hexagon/clone.s=0A= new file mode 100644=0A= index 00000000..42aab67a=0A= --- /dev/null=0A= +++ b/src/thread/hexagon/clone.s=0A= @@ -0,0 +1,37 @@=0A= +// __clone(func, stack, flags, arg, ptid, tls, ctid)=0A= +// r0, r1, r2, r3, r4, r5, stack=0A= +=0A= +// tid =3D syscall(SYS_clone, flags, stack, ptid, ctid, tls)=0A= +// r6, r0, r1, r2, r3, r4=0A= +// if (tid !=3D 0) return=0A= +// func(arg)=0A= +// syscall(SYS_exit)=0A= +=0A= +.text=0A= +.global __clone=0A= +.type __clone,%function=0A= +__clone:=0A= + allocframe(#8)=0A= + // Save pointers for later=0A= + { r11 =3D r0=0A= + r10 =3D r3 }=0A= +=0A= + // Set up syscall args - The stack must be 8 byte aligned.=0A= + { r0 =3D r2=0A= + r1 =3D and(r1, ##0xfffffff8)=0A= + r2 =3D r4 }=0A= + {=0A= + r3 =3D memw(r30+#8)=0A= + r4 =3D r5 }=0A= + r6 =3D #220 // SYS_clone=0A= + trap0(#1)=0A= +=0A= + p0 =3D cmp.eq(r0, #0)=0A= + if (!p0) dealloc_return=0A= +=0A= + { r0 =3D r10=0A= + callr r11 }=0A= +=0A= + r6 =3D #93 // SYS_exit=0A= + trap0(#1)=0A= +.size __clone, .-__clone=0A= diff --git a/src/thread/hexagon/syscall_cp.s = b/src/thread/hexagon/syscall_cp.s=0A= new file mode 100644=0A= index 00000000..50383cad=0A= --- /dev/null=0A= +++ b/src/thread/hexagon/syscall_cp.s=0A= @@ -0,0 +1,35 @@=0A= +// __syscall_cp_asm(&self->cancel, nr, u, v, w, x, y, z)=0A= +// r0 r1 r2 r3 r4 r5 stack stack=0A= +=0A= +// syscall(nr, u, v, w, x, y, z)=0A= +// r6 r0 r1 r2 r3 r4 r5=0A= +=0A= +.text=0A= +.global __cp_begin=0A= +.hidden __cp_begin=0A= +.global __cp_end=0A= +.hidden __cp_end=0A= +.global __cp_cancel=0A= +.hidden __cp_cancel=0A= +.hidden __cancel=0A= +.global __syscall_cp_asm=0A= +.hidden __syscall_cp_asm=0A= +.type __syscall_cp_asm,%function=0A= +__syscall_cp_asm:=0A= +__cp_begin:=0A= + r0 =3D memw(r0+#0)=0A= + {=0A= + p0 =3D cmp.eq(r0, #0); if (!p0.new) jump:nt __cancel=0A= + }=0A= + { r6 =3D r1=0A= + r1:0 =3D combine(r3, r2)=0A= + r3:2 =3D combine(r5, r4) }=0A= + { r4 =3D memw(r29+#0)=0A= + r5 =3D memw(r29+#4) }=0A= + trap0(#1)=0A= +__cp_end:=0A= + jumpr r31=0A= +.size __syscall_cp_asm, .-__syscall_cp_asm=0A= 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