From mboxrd@z Thu Jan 1 00:00:00 1970 X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on inbox.vuxu.org X-Spam-Level: X-Spam-Status: No, score=-3.3 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, MAILING_LIST_MULTI,RCVD_IN_DNSWL_MED,RCVD_IN_MSPIKE_H3, RCVD_IN_MSPIKE_WL,SPF_PASS autolearn=ham autolearn_force=no version=3.4.2 Received: (qmail 10497 invoked from network); 30 Apr 2020 22:45:04 -0000 Received-SPF: pass (mother.openwall.net: domain of lists.openwall.com designates 195.42.179.200 as permitted sender) receiver=inbox.vuxu.org; client-ip=195.42.179.200 envelope-from= Received: from mother.openwall.net (195.42.179.200) by inbox.vuxu.org with ESMTPUTF8; 30 Apr 2020 22:45:04 -0000 Received: (qmail 3127 invoked by uid 550); 30 Apr 2020 22:44:56 -0000 Mailing-List: contact musl-help@lists.openwall.com; run by ezmlm Precedence: bulk List-Post: List-Help: List-Unsubscribe: List-Subscribe: List-ID: Reply-To: musl@lists.openwall.com Received: (qmail 2024 invoked from network); 30 Apr 2020 22:44:45 -0000 DKIM-Signature: a=rsa-sha256; v=1; c=relaxed/relaxed; d=mg.codeaurora.org; q=dns/txt; s=smtp; t=1588286694; h=Content-Type: MIME-Version: Message-ID: Date: Subject: In-Reply-To: References: To: From: Sender; bh=LBeoxNNwZ89O2uUicc0i+PCsFlDzDNHnPfvOVA4WTB4=; b=lOlMhCMY55dDDspkqcENwY5F/4CO61uXRayIrk6ju0bmvRtl5JE6nzsdV1N6Az6/k2O1eYy7 LOFFJ+q5+MujN7UtXuSd8UlVK7JcKpRyfqmmU+uXgN3AIOTNvnjnAEeqIek4PQoGankyNIR/ 45i4RTWgKsgdeLmOKVvrAWH2iU8= X-Mailgun-Sending-Ip: 104.130.122.27 X-Mailgun-Sid: WyI1MGQzMyIsICJtdXNsQGxpc3RzLm9wZW53YWxsLmNvbSIsICJiZTllNGEiXQ== Sender: sidneym=codeaurora.org@mg.codeaurora.org DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org E9CC4C433D2 Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; spf=none smtp.mailfrom=sidneym@codeaurora.org From: To: References: <000a01d61328$7f2614b0$7d723e10$@codeaurora.org> <20200415163015.GG11469@brightrain.aerifal.cx> <029101d6134e$56d4ece0$047ec6a0$@codeaurora.org> <20200415180620.GA23945@port70.net> <20200415182619.GI11469@brightrain.aerifal.cx> <039701d61359$c56efa50$504ceef0$@codeaurora.org> <20200415192940.GJ11469@brightrain.aerifal.cx> In-Reply-To: <20200415192940.GJ11469@brightrain.aerifal.cx> Date: Thu, 30 Apr 2020 17:44:07 -0500 Message-ID: <005a01d61f40$dc8cc7b0$95a65710$@codeaurora.org> MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="----=_NextPart_000_005B_01D61F16.F3BA9040" X-Mailer: Microsoft Outlook 16.0 Thread-Index: AQHkV58ScAdBNwj630CIo9BoWbE/LAG/C8uTAgnT0b4CPVarLQDl/TNKAfnSiBICYVaG/KgbNMHQ Content-Language: en-us X-MS-TNEF-Correlator: 000000000B1BB618A7E047428FD3538EB0AD4B070700C3B68E10F77511CEB4CD00AA00BBB6E600000000000D0000D24C1ADBC84E71428851FA5B72EAAF3800000000E2240000 Subject: RE: [musl] Hexagon DSP support This is a multipart message in MIME format. ------=_NextPart_000_005B_01D61F16.F3BA9040 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit > -----Original Message----- > From: 'Rich Felker' > Sent: Wednesday, April 15, 2020 2:30 PM > To: sidneym@codeaurora.org > Cc: musl@lists.openwall.com > Subject: Re: [musl] Hexagon DSP support > > On Wed, Apr 15, 2020 at 02:12:12PM -0500, sidneym@codeaurora.org wrote: > > src/api/ftw.c:44:1: error: switch condition has boolean value > > [-Werror,-Wswitch-bool] > > Compiling libc-test with -Werror is invalid. It necessarily must produce some > warnings, and needs to be able to distinguish actual errors from them. > > > 8 errors generated. > > src/functional/dlopen.c:39: dlsym main failed: Symbol not found: main > > FAIL src/functional/dlopen.exe [status 1] > > clang-11: warning: argument unused during compilation: '-rdynamic' > > [-Wunused-command-line-argument] > > This is a clang deficiency that's preventing the test from working. > > > src/functional/ipc_msg.c:62: qid_ds.msg_lspid == 0 failed: got 100, > > want 0 > > src/functional/ipc_msg.c:64: (long long)qid_ds.msg_stime == 0 failed: > > got 6815993655711498240, want 0 > > src/functional/ipc_msg.c:67: qid_ds.msg_ctime >= t failed: got > > 70368744177664, want >= 154502684032321054 > > src/functional/ipc_msg.c:71: qid_ds.msg_qbytes > 0 failed: got 0, want > > > 0 > > src/functional/ipc_msg.c:76: qid_ds.msg_qnum == 1 failed: got 0, want > > 1 > > src/functional/ipc_msg.c:77: qid_ds.msg_lspid == getpid() failed: got > > 100, want 185819 > > src/functional/ipc_msg.c:81: msg_stime is 6815993655711498240 want <= > > 154502684032321059 > > src/functional/ipc_msg.c:128: child exit status: 256 FAIL > > src/functional/ipc_msg-static.exe [status 1] > > This is the sysvipc bits headers issue I mentioned. Same with the sem/shm > ones. Passing with updated headers and qemu. > > > src/functional/pthread_mutex.c:145: PTHREAD_MUTEX_ERRORCHECK relock > > did not return EDEADLK, got deadlock > > src/functional/pthread_mutex.c:148: PTHREAD_MUTEX_RECURSIVE relock > did > > not succed, got deadlock FAIL src/functional/pthread_mutex-static.exe > > [status 1] > > src/functional/pthread_mutex.c:145: PTHREAD_MUTEX_ERRORCHECK relock > > did not return EDEADLK, got > > src/functional/pthread_mutex.c:148: PTHREAD_MUTEX_RECURSIVE relock > did > > not succed, got deadlock FAIL src/functional/pthread_mutex.exe [status > > 1] > > This suggests broken atomics. It doesn't look like anything qemu-user could > cause (unless it's just failing to emulate the atomics at all). > Updated QEMU to include time64 changes. Passing now. > > src/functional/pthread_mutex_pi.c:42: > > pthread_mutexattr_setprotocol(&ma, PTHREAD_PRIO_INHERIT) failed: > > Function not implemented > > src/functional/pthread_mutex_pi.c:42: > > pthread_mutexattr_setprotocol(&ma, PTHREAD_PRIO_INHERIT) failed: > > Function not implemented > > src/functional/pthread_mutex_pi.c:148: PTHREAD_MUTEX_ERRORCHECK > relock > > did not return EDEADLK, got deadlock > > src/functional/pthread_mutex_pi.c:42: > > pthread_mutexattr_setprotocol(&ma, PTHREAD_PRIO_INHERIT) failed: > > Function not implemented FAIL > > src/functional/pthread_mutex_pi-static.exe [timed out] > > src/functional/pthread_mutex_pi.c:42: > > pthread_mutexattr_setprotocol(&ma, PTHREAD_PRIO_INHERIT) failed: > > Function not implemented > > src/functional/pthread_mutex_pi.c:42: > > pthread_mutexattr_setprotocol(&ma, PTHREAD_PRIO_INHERIT) failed: > > Function not implemented > > src/functional/pthread_mutex_pi.c:148: PTHREAD_MUTEX_ERRORCHECK > relock > > did not return EDEADLK, got deadlock > > src/functional/pthread_mutex_pi.c:42: > > pthread_mutexattr_setprotocol(&ma, PTHREAD_PRIO_INHERIT) failed: > > Function not implemented > > src/functional/pthread_mutex_pi.c:151: PTHREAD_MUTEX_RECURSIVE > relock > > did not succed, got deadlock > > src/functional/pthread_mutex_pi.c:87: > > pthread_mutexattr_setprotocol(&ma, PTHREAD_PRIO_INHERIT) failed: > > Function not implemented > > src/functional/pthread_mutex_pi.c:24: pthread_mutex_unlock(a[0]) > > failed: Operation not permitted FAIL > > src/functional/pthread_mutex_pi.exe [signal Segmentation fault] > > src/functional/pthread_robust.c:39: > > pthread_mutexattr_setrobust(&mtx_a, PTHREAD_MUTEX_ROBUST) failed: > > (pshared==0, pi==0) Function not implemented (setting robust > > attribute) FAIL src/functional/pthread_robust-static.exe [timed out] > > src/functional/pthread_robust.c:39: > > pthread_mutexattr_setrobust(&mtx_a, PTHREAD_MUTEX_ROBUST) failed: > > (pshared==0, pi==0) Function not implemented (setting robust > > attribute) FAIL src/functional/pthread_robust.exe [timed out] > > These are all expected on qemu-user: kernel prio-inherit and robust features > are not emulated by qemu. > > > src/functional/sem_init.c:19: sem_timedwait(s+1, &ts) failed: > > Operation timed out > > src/functional/sem_init.c:19: sem_timedwait(s+1, &ts) failed: > > Operation timed out > > src/functional/sem_init.c:19: sem_timedwait(s+1, &ts) failed: > > Operation timed out > > src/functional/sem_init.c:49: sem value should be 0, got 3 FAIL > > src/functional/sem_init-static.exe [status 1] > > src/functional/sem_init.c:19: sem_timedwait(s+1, &ts) failed: > > Operation timed out > > src/functional/sem_init.c:19: sem_timedwait(s+1, &ts) failed: > > Operation timed out > > src/functional/sem_init.c:19: sem_timedwait(s+1, &ts) failed: > > Operation timed out > > src/functional/sem_init.c:49: sem value should be 0, got 3 FAIL > > src/functional/sem_init.exe [status 1] > > This is probably broken atomics again. Passed with updated headers and QEMU. > > > src/functional/strptime.c:23: "%F": failed to parse "1856-07-10" > > src/functional/strptime.c:23: "%s": failed to parse "683078400" > > src/functional/strptime.c:47: "%z": failed to parse "+0200" > > src/functional/strptime.c:47: "%z": failed to parse "-0530" > > src/functional/strptime.c:47: "%z": failed to parse "-06" > > FAIL src/functional/strptime-static.exe [status 1] > > src/functional/strptime.c:23: "%F": failed to parse "1856-07-10" > > src/functional/strptime.c:23: "%s": failed to parse "683078400" > > src/functional/strptime.c:47: "%z": failed to parse "+0200" > > src/functional/strptime.c:47: "%z": failed to parse "-0530" > > src/functional/strptime.c:47: "%z": failed to parse "-06" > > FAIL src/functional/strptime.exe [status 1] > > These are expected, functionality musl does not yet support (future-standard, I > think). > > > src/functional/utime.c:38: st.st_atim.tv_sec == 0 failed: 1 > > src/functional/utime.c:40: st.st_mtim.tv_sec == 0 failed: 1073741822 > > src/functional/utime.c:47: st.st_atim.tv_sec >= t failed: 0 > > src/functional/utime.c:48: st.st_mtim.tv_sec == 0 failed: 1073741823 > > src/functional/utime.c:55: st.st_mtim.tv_sec >= t failed: 1073741822 > > src/functional/utime.c:59: st.st_atim.tv_sec >= t failed: 0 > > src/functional/utime.c:60: st.st_mtim.tv_sec >= t failed: 1073741823 > > src/functional/utime.c:65: st.st_atim.tv_sec == 1LL<<32 failed: 0 > > src/functional/utime.c:66: st.st_mtim.tv_sec == 1LL<<32 failed: 0 FAIL > > src/functional/utime-static.exe [status 1] > > src/functional/utime.c:38: st.st_atim.tv_sec == 0 failed: 1 > > src/functional/utime.c:40: st.st_mtim.tv_sec == 0 failed: 1073741822 > > src/functional/utime.c:47: st.st_atim.tv_sec >= t failed: 0 > > src/functional/utime.c:48: st.st_mtim.tv_sec == 0 failed: 1073741823 > > src/functional/utime.c:55: st.st_mtim.tv_sec >= t failed: 1073741822 > > src/functional/utime.c:59: st.st_atim.tv_sec >= t failed: 0 > > src/functional/utime.c:60: st.st_mtim.tv_sec >= t failed: 1073741823 > > src/functional/utime.c:65: st.st_atim.tv_sec == 1LL<<32 failed: 0 > > src/functional/utime.c:66: st.st_mtim.tv_sec == 1LL<<32 failed: 0 FAIL > > src/functional/utime.exe [status 1] > > Looks like something is wrong here, possibly wrong struct kstat, or it could be a > qemu bug. It seems like QEMU's TARGET_NR_utimensat needs to changes similar to those done for clock_get/settime to account for 64bit time_t. I made some changes but the last 2 checks at 65 and 66 still fail. > > > src/math/ucb/sqrt.h:47: bad fp exception: RN > > sqrt(0x1.fffffffffffffp+1023)=0x1.fffffffffffffp+511, want INEXACT got > > 0 [...] > > src/math/special/sqrt.h:74: bad fp exception: RN > > sqrtl(0x1.9b294f88p-1015)=0x1.cad197e28e85bp-508, want INEXACT got 0 > > FAIL src/math/sqrtl.exe [status 1] > > These are likely all general (not arch-specific) clang floating point bugs. We > should see if they also happen compiling other archs without asm versions of > sqrt. Assembly version of sqrt does pass. > > Alternatively it might be a qemu fpu emulation bug. I've seen this kind of thing > (inconsistent across arch) on other archs under qemu-user. > > > src/regression/malloc-brk-fail.c:41: malloc(10000) failed (eventhough > > 64k is available to mmap): Out of memory FAIL > > src/regression/malloc-brk-fail-static.exe [status 1] FAIL > > src/regression/malloc-brk-fail.exe [timed out] > > This test does not seem to work on modern kernels much less qemu-user. > > > src/regression/pthread-robust-detach.c:33: > pthread_mutexattr_setrobust(&mtx_a, 1) failed: (pshared==0) got 38 > "Function not implemented" want 0 "No error information" > > src/regression/pthread-robust-detach.c:50: pthread_mutex_timedlock(&mtx, > &ts) failed: (pshared==0) got 110 "Operation timed out" want 130 "Previous > owner died" > > src/regression/pthread-robust-detach.c:33: > pthread_mutexattr_setrobust(&mtx_a, 1) failed: (pshared==1) got 38 > "Function not implemented" want 0 "No error information" > > src/regression/pthread-robust-detach.c:50: pthread_mutex_timedlock(&mtx, > &ts) failed: (pshared==1) got 110 "Operation timed out" want 130 "Previous > owner died" > > FAIL src/regression/pthread-robust-detach-static.exe [status 1] > > src/regression/pthread-robust-detach.c:33: > pthread_mutexattr_setrobust(&mtx_a, 1) failed: (pshared==0) got 38 > "Function not implemented" want 0 "No error information" > > src/regression/pthread-robust-detach.c:50: pthread_mutex_timedlock(&mtx, > &ts) failed: (pshared==0) got 110 "Operation timed out" want 130 "Previous > owner died" > > src/regression/pthread-robust-detach.c:33: > pthread_mutexattr_setrobust(&mtx_a, 1) failed: (pshared==1) got 38 > "Function not implemented" want 0 "No error information" > > src/regression/pthread-robust-detach.c:50: pthread_mutex_timedlock(&mtx, > &ts) failed: (pshared==1) got 110 "Operation timed out" want 130 "Previous > owner died" > > FAIL src/regression/pthread-robust-detach.exe [status 1] > > Expected on qemu-user. > > > src/regression/pthread_cond-smasher.c:140: main thread in phase 0 (0 > > threads inside), finished waiting: Operation timed out FAIL > > src/regression/pthread_cond-smasher-static.exe [status 1] > > src/regression/pthread_cond-smasher.c:104: thread 5 in phase 0 (0) > > finished waiting: Operation timed out FAIL > > src/regression/pthread_cond-smasher.exe [status 1] > > These could be atomic bugs or just emulation being slow. I bumped the timeout to 240 seconds it might have fixed these. > > > src/regression/pthread_cond_wait-cancel_ignored.c:52: > > pthread_cond_wait did not act on cancellation FAIL > > src/regression/pthread_cond_wait-cancel_ignored-static.exe [status 1] > > src/regression/pthread_once-deadlock.c:41: sem_timedwait(s,&ts) > > failed: Operation timed out > > src/regression/pthread_once-deadlock.c:44: pthread_once deadlocked > > FAIL src/regression/pthread_once-deadlock-static.exe [status 1] > > These are definitely atomic bugs (either in the arch bits or in qemu). Also fixed, time64 change to QEMU was key to correcting a lot of these issues. > > Rich Hi, Updated libc-test REPORT and musl patch are attached. I had to update QEMU, pulling in 64bit time changes and routing the system calls to those interfaces. The routing of the syscalls to the 64bit interfaces is not committed but the patch for it is here: https://github.com/qemu/qemu/commit/b792b073e1042ca2668adb57142efba838620329 The Hexagon branch of musl is here: https://github.com/quic/musl/tree/hexagon The sqrt routine I added is from compiler-rt.builtins and it is more involved than other target's versions. I can see how sqrt might be excluded from the c-library to keep the target specific complexity to a minimum. Thanks, ------=_NextPart_000_005B_01D61F16.F3BA9040 Content-Type: application/ms-tnef; name="winmail.dat" Content-Transfer-Encoding: quoted-printable Content-Disposition: attachment; filename="winmail.dat" x=9F>" = =16=01=06=90=08=00=04=00=00=00=00=00=01=00=01=00=01=07=90=06=00=08=00=00=00= =E4=04=00=00=00=00=00=00=E8=00=01=08=80=07=00=18=00=00=00IPM.Microsoft = Mail.Note=001=08=01=03=90=06=00=F8=19=00=00-=00=00=00=0B=00=02=00=01=00=00= =00=03=00&=00=00=00=00=00=0B=00)=00=00=00=00=00=0B=00+=00=00=00=00=00=03=00= .=00=00=00=00=00=1E=00p=00=01=00=00=00=1B=00=00=00[musl] Hexagon DSP = support=00=00=02=01q=00=01=00=00=009=00=00=00=01=01=E4W=9F=12p=07A7=08=FA= =DF@=88=A3=D0hY=B1?,=01=BF=0B=CB=93=02 = =D3=D1=BE=02=3DV=AB-=00=E5=FD3J=01=F9=D2=88=12=02aV=86=FC=A8=1B4=C1=D0=00= =00=00=0B=00=01=0E=00=00=00=00=02=01=0A= =0E=01=00=00=00.=00=00=00=00=00=00=00=0B=1B=B6=18=A7=E0GB=8F=D3S=8E=B0=AD= K=07=01=00=C3=B6=8E=10=F7u=11=CE=B4=CD=00=AA=00=BB=B6=E6=00=00=00=00=00=0E= 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_*=C0Yh`PcP^=B0s9=90d6oa=90U=83y)=E0#=D1pp=F4or=95=D0(Y`ab=B9=02`=90;S@$1= I=D0f=F5=A0V=E0k)=EFc=BF=CC=BF=F6 =BCD3=0EAM=F1=B9=10#Q=10=911.tv)=C1c = =F7T=B0=95p4=071=DB=1F=DC.=C3P=DDF=8FP=E0=DD=EF=DE=F5=BE=A0374=BEP=FC22=DF= o=E0=7F=CE=81=DDo=D0=D0=DE=90=FBa=114%0=E4O=E5_=DD7=E2=1F=E3/=E63=E8=9F=DC= .55=EA=CF=E7=8E=E3=AF=7F=ED=EF=EE=F8=94=12=E6=AF=E7=BF=F2=8F=DC[6=7F=E1=8F= =F5=8F=EC=DF=F7=1F=F8(=EF=97=DD=CD1=C0LL<<32=F6=0F=FB=FF=FD=F8(6=F8=DF=FE= =CF=FF=D4=96=0F=00=FF=B8=FF=FF=BA=0F=05=EF=DC=DF=EBo=DE=FF = =1F=E1=1F=0B?=FF=F1O=0C=CF=0D=DF=E6o=F9=DF=00/=12=AF=EA=AF=FF=0F=EF=FA=DF= =16_=EE=EF=F9/=FA?=11o=1B=AF=FF=F4?=1D=CF=15=AF = =7F=F8=7F"=9F=19=EF$/=FF=FC=BF!=FF=03=8F#=BF)=AF=02=0F+=CF=04/=CF-=9F = =8C=07=9F=DA=CBLo=9B=80=080=FF=D6=80=9B=90Y=10=9B=F0P@=DA1W=00=9Aq=AEwP`V= =F1`!eTqo=9D=90=EFX`=9B17=E4=C0=91u^=10_0=07"=AF=D5=D0=D80U=C0=95=D0c=95=06= a=D0fS^=92c0ug=9C=ABI=D7=D1e=17}06=A5=9Fr'=080TAR=80GET_NR_=0A= =03=DCnsb=F0U=80=3D=80d=080=C6=E1=FEcS=F0V=F0=D7A8=D0=9C=00b=E0:=80=FF=C6= =E1O 8=B0=95`=D7 = _p=8Fp:q@clock_@=A0t=CF=8D=01V=C1=91P=C6=D2ac:=D1V@qB364b`Q=912=8E0.=FA = E`I=D6=C0=9E=D17=03@WXq=FF=DA=11=95`b=E0a=01,=E0@`^=006=91=FF?=A1*=F0=9F#= /=A0+!R=D0=D7=00=8F=82=9F=9F=BF2=BAE=B0O = =F0cb=8D=00rq=D8@.h=CEc=9B=00^@frp]=C1ce=BC!U`=CE=F0R=06N2=99L=11(0x1.=9A= fO*p=8E=F0=C7=903)T=C0qN=FF+51=8F=01=8E=90D!I=C0NEXACT=95=A2=D0h=B9=0C=10= [.S=C0=08mKss]=F1~i=8C=E2L=14=1FPL=9FM=AF=D8@l=01N=D39b294f8=A48p=BE=C115= PTcE=C0A=8D=C07e28e=BE`b=F1Y`508Q=DF=95=D0-=89=D1=07=FFT=E4XR4=7F=D3=DF=D4= =E56=C2=9B1=94=90=DF=D7=00@=A0?=D0=90=C0=D7=00(=D7r\=A0=F7@`=07=10UBf=07`= =8F`B=80@=81=FF=8FpB=90=07A9a=D8 = =9C=80=95=D0_u1=BF=F0i=80ip8A=FD=0E=A11=0E=D2= E=B0u=10sQ=F2=F2=E4=A1=FF8=90@p`q=0C=10N=D0=F0=E8=F2=D4=C2=00=B7u=108=D0E= =D0):Pc=00ns=80=FFG = =88=D0[`:=A07q=80A=ED_H@=FF=85=7F=F8=BF=F9=CD=C0=EF=C1=FF=01=DF=F9=BF=FA=C1= =DE0V1=FB=85Hp=FB=FB)=F0=E8=FE=7F=FF=FF=8F=00=9F=05=DF=06=EF=F71=04o_=7FF= 1=BF:=E7A`p=900=E0d=A2:bj=DE=D1=D5q=CAe7rsB=90w<|ra=BFg=B0=88=C1G=12=88=92= i2Aa2=FA=F0=FF=3Da=F9=F2=FD=C1pv@pr=E1c=00=100=7F=16=B3`pn=1F=0Do=0E=7F=DD= =B0=0B2-=F7Z .=90a=10_p=A0b = =C9A!=92=FE2=DC=C7=DD8=1D=17=D91=88=D0b#9=D1=FFl=D1=1D=B4r=05=0D=0F=1B=DF= =1C=EF=1D=F8=03=EF=FF=04=FF#=7F=DD=92=87=10V=F0=DC=01E=C0B=92=8F{=A5l=11=E9= =94=0B2(s,=EB=12=FF=0A= = =EBu=0B=CFF=E0'=AF(=BF)=CEV1=FF0=1Amp*=15=88=C0=F0=EF/O0_&O=FF=10=BF`=0CE= =D0=0A= =A2=E3Pa"=13 = }`=FFi=01ha=FBS`=82=8DqD=B1=13=93=FBQ=FDqB)k,f=E2=19c[@=88=92D=90=C3FEC=92= QEMU[Qs=91=FFf=A1=8B=B1=12`=E4`=F61g=F2q = 2=E0=E7=80=83=19=C3~=E1su``=1A=1F3d=CER6=C0~=053DHi=EA=853D=B8UpdT=F0=88=C1= `=E0b{=00=C1=8A=83REPOR\=10cp=EF=88=D0=E9@=150m=C1t=8Dq`=A2=DE!{=DCA=1Eq = r=B0g=11=16=B1@=A0u=FFF3?=B3[@q=A0a`g=F2=FBQ~=B0=FF=0A= +=0A= +#if __BYTE_ORDER =3D=3D __LITTLE_ENDIAN=0A= +#define ENDIAN_SUFFIX "el"=0A= +#else=0A= +#define ENDIAN_SUFFIX ""=0A= +#endif=0A= +=0A= +#define FP_SUFFIX ""=0A= +=0A= +#define LDSO_ARCH "hexagon" ENDIAN_SUFFIX FP_SUFFIX=0A= +=0A= +#define TPOFF_K 0=0A= +=0A= +#define REL_SYMBOLIC R_HEX_32=0A= +#define REL_GOT R_HEX_GLOB_DAT=0A= +#define REL_PLT R_HEX_JMP_SLOT=0A= +#define REL_RELATIVE R_HEX_RELATIVE=0A= +#define REL_COPY R_HEX_COPY=0A= +#define REL_DTPMOD R_HEX_DTPMOD_32=0A= +#define REL_TPOFF R_HEX_TPREL_32=0A= +#define REL_DTPOFF R_HEX_DTPREL_32=0A= +=0A= +#define CRTJMP(pc,sp) __asm__ __volatile__( \=0A= + "r29 =3D %1 ; jumpr %0" : : "r"(pc), "r"(sp) : "memory" )=0A= diff --git a/arch/hexagon/syscall_arch.h b/arch/hexagon/syscall_arch.h=0A= new file mode 100644=0A= index 00000000..e6defe41=0A= --- /dev/null=0A= +++ b/arch/hexagon/syscall_arch.h=0A= @@ -0,0 +1,77 @@=0A= +=0A= +#define __SYSCALL_LL_E(x) \=0A= +((union { long long ll; long l[2]; }){ .ll =3D x }).l[0], \=0A= +((union { long long ll; long l[2]; }){ .ll =3D x }).l[1]=0A= +#define __SYSCALL_LL_O(x) 0, __SYSCALL_LL_E((x))=0A= +=0A= +#define __asm_syscall(...) do { \=0A= + __asm__ __volatile__ ( "trap0(#1)" \=0A= + : "=3Dr"(r0) : __VA_ARGS__ : "memory"); \=0A= + return r0; \=0A= + } while (0)=0A= +=0A= +static inline long __syscall0(long n)=0A= +{=0A= + register long r6 __asm__("r6") =3D n;=0A= + register long r0 __asm__("r0");=0A= + __asm_syscall("r"(r6));=0A= +}=0A= +=0A= +static inline long __syscall1(long n, long a)=0A= +{=0A= + register long r6 __asm__("r6") =3D n;=0A= + register long r0 __asm__("r0") =3D a;=0A= + __asm_syscall("r"(r6), "0"(r0));=0A= +}=0A= +=0A= +static inline long __syscall2(long n, long a, long b)=0A= +{=0A= + register long r6 __asm__("r6") =3D n;=0A= + register long r0 __asm__("r0") =3D a;=0A= + register long r1 __asm__("r1") =3D b;=0A= + __asm_syscall("r"(r6), "0"(r0), "r"(r1));=0A= +}=0A= +=0A= +static inline long __syscall3(long n, long a, long b, long c)=0A= +{=0A= + register long r6 __asm__("r6") =3D n;=0A= + register long r0 __asm__("r0") =3D a;=0A= + register long r1 __asm__("r1") =3D b;=0A= + register long r2 __asm__("r2") =3D c;=0A= + __asm_syscall("r"(r6), "0"(r0), "r"(r1), "r"(r2));=0A= +}=0A= +=0A= +static inline long __syscall4(long n, long a, long b, long c, long d)=0A= +{=0A= + register long r6 __asm__("r6") =3D n;=0A= + register long r0 __asm__("r0") =3D a;=0A= + register long r1 __asm__("r1") =3D b;=0A= + register long r2 __asm__("r2") =3D c;=0A= + register long r3 __asm__("r3") =3D d;=0A= + __asm_syscall("r"(r6), "0"(r0), "r"(r1), "r"(r2), "r"(r3));=0A= +}=0A= +=0A= +static inline long __syscall5(long n, long a, long b, long c, long d, = long e)=0A= +{=0A= + register long r6 __asm__("r6") =3D n;=0A= + register long r0 __asm__("r0") =3D a;=0A= + register long r1 __asm__("r1") =3D b;=0A= + register long r2 __asm__("r2") =3D c;=0A= + register long r3 __asm__("r3") =3D d;=0A= + register long r4 __asm__("r4") =3D e;=0A= + __asm_syscall("r"(r6), "0"(r0), "r"(r1), "r"(r2), "r"(r3), "r"(r4));=0A= +}=0A= +=0A= +static inline long __syscall6(long n, long a, long b, long c, long d, = long e, long f)=0A= +{=0A= + register long r6 __asm__("r6") =3D n;=0A= + register long r0 __asm__("r0") =3D a;=0A= + register long r1 __asm__("r1") =3D b;=0A= + register long r2 __asm__("r2") =3D c;=0A= + register long r3 __asm__("r3") =3D d;=0A= + register long r4 __asm__("r4") =3D e;=0A= + register long r5 __asm__("r5") =3D f;=0A= + __asm_syscall("r"(r6), "0"(r0), "r"(r1), "r"(r2), "r"(r3), "r"(r4), = "r"(r5));=0A= +}=0A= +=0A= +#define SYSCALL_FADVISE_6_ARG=0A= diff --git a/configure b/configure=0A= index a2728969..344835ae 100755=0A= --- a/configure=0A= +++ b/configure=0A= @@ -312,6 +312,7 @@ case "$target" in=0A= # Catch these early to simplify matching for 32-bit archs=0A= arm*) ARCH=3Darm ;;=0A= aarch64*) ARCH=3Daarch64 ;;=0A= +hexagon*) ARCH=3Dhexagon ;;=0A= i?86-nt32*) ARCH=3Dnt32 ;;=0A= i?86*) ARCH=3Di386 ;;=0A= x86_64-x32*|x32*|x86_64*x32) ARCH=3Dx32 ;;=0A= diff --git a/include/elf.h b/include/elf.h=0A= index 549f92c1..54251c24 100644=0A= --- a/include/elf.h=0A= +++ b/include/elf.h=0A= @@ -3284,6 +3284,107 @@ enum=0A= #define R_RISCV_SET32 56=0A= #define R_RISCV_32_PCREL 57=0A= =0A= +#define R_HEX_NONE 0=0A= +#define R_HEX_B22_PCREL 1=0A= +#define R_HEX_B15_PCREL 2=0A= +#define R_HEX_B7_PCREL 3=0A= +#define R_HEX_LO16 4=0A= +#define R_HEX_HI16 5=0A= +#define R_HEX_32 6=0A= +#define R_HEX_16 7=0A= +#define R_HEX_8 8=0A= +#define R_HEX_GPREL16_0 9=0A= +#define R_HEX_GPREL16_1 10=0A= +#define R_HEX_GPREL16_2 11=0A= +#define R_HEX_GPREL16_3 12=0A= +#define R_HEX_HL16 13=0A= +#define R_HEX_B13_PCREL 14=0A= +#define R_HEX_B9_PCREL 15=0A= +#define R_HEX_B32_PCREL_X 16=0A= +#define R_HEX_32_6_X 17=0A= +#define R_HEX_B22_PCREL_X 18=0A= +#define R_HEX_B15_PCREL_X 19=0A= +#define R_HEX_B13_PCREL_X 20=0A= +#define R_HEX_B9_PCREL_X 21=0A= +#define R_HEX_B7_PCREL_X 22=0A= +#define R_HEX_16_X 23=0A= +#define R_HEX_12_X 24=0A= +#define R_HEX_11_X 25=0A= +#define R_HEX_10_X 26=0A= +#define R_HEX_9_X 27=0A= +#define R_HEX_8_X 28=0A= +#define R_HEX_7_X 29=0A= +#define R_HEX_6_X 30=0A= +#define R_HEX_32_PCREL 31=0A= +#define R_HEX_COPY 32=0A= +#define R_HEX_GLOB_DAT 33=0A= +#define R_HEX_JMP_SLOT 34=0A= +#define R_HEX_RELATIVE 35=0A= +#define R_HEX_PLT_B22_PCREL 36=0A= +#define R_HEX_GOTOFF_LO16 37=0A= +#define R_HEX_GOTOFF_HI16 38=0A= +#define R_HEX_GOTOFF_32 39=0A= +#define R_HEX_GOT_LO16 40=0A= +#define R_HEX_GOT_HI16 41=0A= +#define R_HEX_GOT_32 42=0A= +#define R_HEX_GOT_16 43=0A= +#define R_HEX_DTPMOD_32 44=0A= +#define R_HEX_DTPREL_LO16 45=0A= +#define R_HEX_DTPREL_HI16 46=0A= +#define R_HEX_DTPREL_32 47=0A= +#define R_HEX_DTPREL_16 48=0A= +#define R_HEX_GD_PLT_B22_PCREL 49=0A= +#define R_HEX_GD_GOT_LO16 50=0A= +#define R_HEX_GD_GOT_HI16 51=0A= +#define R_HEX_GD_GOT_32 52=0A= +#define R_HEX_GD_GOT_16 53=0A= +#define R_HEX_IE_LO16 54=0A= +#define R_HEX_IE_HI16 55=0A= +#define R_HEX_IE_32 56=0A= +#define R_HEX_IE_GOT_LO16 57=0A= +#define R_HEX_IE_GOT_HI16 58=0A= +#define R_HEX_IE_GOT_32 59=0A= +#define R_HEX_IE_GOT_16 60=0A= +#define R_HEX_TPREL_LO16 61=0A= +#define R_HEX_TPREL_HI16 62=0A= +#define R_HEX_TPREL_32 63=0A= +#define R_HEX_TPREL_16 64=0A= +#define R_HEX_6_PCREL_X 65=0A= +#define R_HEX_GOTREL_32_6_X 66=0A= +#define R_HEX_GOTREL_16_X 67=0A= +#define R_HEX_GOTREL_11_X 68=0A= +#define R_HEX_GOT_32_6_X 69=0A= +#define R_HEX_GOT_16_X 70=0A= +#define R_HEX_GOT_11_X 71=0A= +#define R_HEX_DTPREL_32_6_X 72=0A= +#define R_HEX_DTPREL_16_X 73=0A= +#define R_HEX_DTPREL_11_X 74=0A= +#define R_HEX_GD_GOT_32_6_X 75=0A= +#define R_HEX_GD_GOT_16_X 76=0A= +#define R_HEX_GD_GOT_11_X 77=0A= +#define R_HEX_IE_32_6_X 78=0A= +#define R_HEX_IE_16_X 79=0A= +#define R_HEX_IE_GOT_32_6_X 80=0A= +#define R_HEX_IE_GOT_16_X 81=0A= +#define R_HEX_IE_GOT_11_X 82=0A= +#define R_HEX_TPREL_32_6_X 83=0A= +#define R_HEX_TPREL_16_X 84=0A= +#define R_HEX_TPREL_11_X 85=0A= +#define R_HEX_LD_PLT_B22_PCREL 86=0A= +#define R_HEX_LD_GOT_LO16 87=0A= +#define R_HEX_LD_GOT_HI16 88=0A= +#define R_HEX_LD_GOT_32 89=0A= +#define R_HEX_LD_GOT_16 90=0A= +#define R_HEX_LD_GOT_32_6_X 91=0A= +#define R_HEX_LD_GOT_16_X 92=0A= +#define R_HEX_LD_GOT_11_X 93=0A= +#define R_HEX_23_REG 94=0A= +#define R_HEX_GD_PLT_B22_PCREL_X 95=0A= +#define R_HEX_GD_PLT_B32_PCREL_X 96=0A= +#define R_HEX_LD_PLT_B22_PCREL_X 97=0A= +#define R_HEX_LD_PLT_B32_PCREL_X 98=0A= +=0A= +=0A= #ifdef __cplusplus=0A= }=0A= #endif=0A= diff --git a/src/fenv/hexagon/fenv.S b/src/fenv/hexagon/fenv.S=0A= new file mode 100644=0A= index 00000000..07b89764=0A= --- /dev/null=0A= +++ b/src/fenv/hexagon/fenv.S=0A= @@ -0,0 +1,143 @@=0A= +/*=0A= +The Hexagon user status register includes five status fields which work = as=0A= +sticky flags for the five IEEE-defined exception conditions: inexact, = overflow, underflow,=0A= +divide by zero, and invalid. A sticky flag is set when the = corresponding exception occurs,=0A= +and remains set until explicitly cleared.=0A= +=0A= + usr:23:22 - Rounding Mode=0A= + 00: Round toward nearest=0A= + 01: Round toward zero=0A= + 10: Downward Round toward negative infinity=0A= + 11: Upward Round toward positive infinity=0A= +=0A= + usr:5 - Floating-point IEEE Inexact Sticky Flag.=0A= + usr:4 - Floating-point IEEE Underflow Sticky Flag.=0A= + usr:3 - Floating-point IEEE Overflow Sticky Flag.=0A= + usr:2 - Floating-point IEEE Divide-By-Zero Sticky Flag.=0A= + usr:1 - Floating-point IEEE Invalid Sticky Flag.=0A= + usr:0 - Sticky Saturation Overflow, when 1 saturation occurred.=0A= +*/=0A= +=0A= +#define FE_ALL_EXCEPT 0x3f=0A= +=0A= +#define USR_FE_MASK 0x3fc0003f=0A= +#define RND_MASK (0x3 << 22)=0A= +#define RND_NEAR (0x0 << 22)=0A= +#define RND_ZERO (0x1 << 22)=0A= +#define RND_DOWN (0x2 << 22)=0A= +#define RND_UP (0x3 << 22)=0A= +=0A= +/*=0A= +int feclearexcept(int mask)=0A= +*/=0A= +.global feclearexcept=0A= +.type feclearexcept,@function=0A= +feclearexcept:=0A= + {=0A= + r0 =3D and(r0, #FE_ALL_EXCEPT) // Only touch the IEEE flag bits.=0A= + r1 =3D usr=0A= + }=0A= + r1 =3D and(r1, ~r0)=0A= + {=0A= + usr =3D r1=0A= + r0 =3D #0=0A= + jumpr r31=0A= + }=0A= +=0A= +/*=0A= +int feraiseexcept(int mask)=0A= +*/=0A= +.global feraiseexcept=0A= +.type feraiseexcept,@function=0A= +feraiseexcept:=0A= + {=0A= + r0 =3D and(r0, #FE_ALL_EXCEPT) // Only touch the IEEE flag bits.=0A= + r1 =3D usr=0A= + }=0A= + r1 =3D or(r1, r0)=0A= + {=0A= + usr =3D r1=0A= + r0 =3D #0=0A= + jumpr r31=0A= + }=0A= +=0A= +=0A= +/*=0A= +int fetestexcept(int mask)=0A= +*/=0A= +.global fetestexcept=0A= +.type fetestexcept,@function=0A= +fetestexcept:=0A= + {=0A= + r0 =3D and(r0, #FE_ALL_EXCEPT) // Only touch the IEEE flag bits.=0A= + r1 =3D usr=0A= + }=0A= + {=0A= + r0 =3D and(r1, r0)=0A= + jumpr r31=0A= + }=0A= +=0A= +/*=0A= +int fegetround(void)=0A= +*/=0A= +.global fegetround=0A= +.type fegetround,@function=0A= +fegetround:=0A= + r0 =3D usr=0A= + r0 =3D and(r0, ##RND_MASK)=0A= + r0 =3D lsr(r0, #22);=0A= + jumpr r31=0A= +=0A= +/*=0A= +int __fesetround(int r)=0A= +*/=0A= +.global __fesetround=0A= +.type __fesetround,@function=0A= +__fesetround:=0A= + {=0A= + r0 =3D and(r0, #0x3) // Can only be 0,1,2, or 3=0A= + r1 =3D usr=0A= + r2 =3D ##RND_MASK=0A= + }=0A= + {=0A= + r1 =3D and (r1, ~r2) // Clear the current rounding bits.=0A= + r0 =3D asl (r0, #22)=0A= + }=0A= + r1 =3D or(r1, r0)=0A= + usr =3D r1=0A= + {=0A= + r0 =3D #0; jumpr r31=0A= + }=0A= +=0A= +/*=0A= +int fegetenv(fenv_t *envp)=0A= +*/=0A= +.global fegetenv=0A= +.type fegetenv,@function=0A= +fegetenv:=0A= + r1 =3D usr=0A= + memw(r0) =3D r1=0A= + {=0A= + r0 =3D #0=0A= + jumpr r31=0A= + }=0A= +=0A= +/*=0A= +int fesetenv(const fenv_t *envp)=0A= +*/=0A= +.global fesetenv=0A= +.type fesetenv,@function=0A= +fesetenv:=0A= + { p0 =3D cmp.eq(r0, #-1); if (p0.new) r1 =3D #0 } /* The default = mode */=0A= + if (!p0) r1 =3D memw(r0) /* stored in fenv_t = */=0A= +=0A= + r2 =3D ##USR_FE_MASK // USR:FE bit mask=0A= + r1 =3D and(r1, r2) // MASK the input bits with the FE bits=0A= + r3 =3D usr=0A= + r3 =3D and(r3, ~r2) // Clear any currently set FE bits=0A= + r3 =3D or(r3, r1) // Set the newbits=0A= + usr =3D r3=0A= + {=0A= + r0 =3D #0=0A= + jumpr r31=0A= + }=0A= diff --git a/src/math/hexagon/sqrt.S b/src/math/hexagon/sqrt.S=0A= new file mode 100644=0A= index 00000000..38b240f0=0A= --- /dev/null=0A= +++ b/src/math/hexagon/sqrt.S=0A= @@ -0,0 +1,388 @@=0A= +//=0A= +// From the LLVM Project, under the Apache License v2.0 with LLVM = Exceptions.=0A= +// See https://llvm.org/LICENSE.txt for license information.=0A= +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception=0A= +//=0A= +=0A= +/* Double Precision square root */=0A= +=0A= +#define EXP r28=0A= +=0A= +#define A r1:0=0A= +#define AH r1=0A= +#define AL r0=0A= +=0A= +#define SFSH r3:2=0A= +#define SF_S r3=0A= +#define SF_H r2=0A= +=0A= +#define SFHALF_SONE r5:4=0A= +#define S_ONE r4=0A= +#define SFHALF r5=0A= +#define SF_D r6=0A= +#define SF_E r7=0A= +#define RECIPEST r8=0A= +#define SFRAD r9=0A= +=0A= +#define FRACRAD r11:10=0A= +#define FRACRADH r11=0A= +#define FRACRADL r10=0A= +=0A= +#define ROOT r13:12=0A= +#define ROOTHI r13=0A= +#define ROOTLO r12=0A= +=0A= +#define PROD r15:14=0A= +#define PRODHI r15=0A= +#define PRODLO r14=0A= +=0A= +#define P_TMP p0=0A= +#define P_EXP1 p1=0A= +#define NORMAL p2=0A= +=0A= +#define SF_EXPBITS 8=0A= +#define SF_MANTBITS 23=0A= +=0A= +#define DF_EXPBITS 11=0A= +#define DF_MANTBITS 52=0A= +=0A= +#define DF_BIAS 0x3ff=0A= +=0A= +#define DFCLASS_ZERO 0x01=0A= +#define DFCLASS_NORMAL 0x02=0A= +#define DFCLASS_DENORMAL 0x02=0A= +#define DFCLASS_INFINITE 0x08=0A= +#define DFCLASS_NAN 0x10=0A= +=0A= + .text=0A= + .global sqrt=0A= + .type sqrt,@function=0A= + .p2align 5=0A= +sqrt:=0A= + {=0A= + PROD =3D extractu(A,#SF_MANTBITS+1,#DF_MANTBITS-SF_MANTBITS)=0A= + EXP =3D extractu(AH,#DF_EXPBITS,#DF_MANTBITS-32)=0A= + SFHALF_SONE =3D combine(##0x3f000004,#1)=0A= + }=0A= + {=0A= + NORMAL =3D dfclass(A,#DFCLASS_NORMAL) // Is it normal=0A= + NORMAL =3D cmp.gt(AH,#-1) // and positive?=0A= + if (!NORMAL.new) jump:nt .Lsqrt_abnormal=0A= + SFRAD =3D or(SFHALF,PRODLO)=0A= + }=0A= +#undef NORMAL=0A= +.Ldenormal_restart:=0A= + {=0A= + FRACRAD =3D A=0A= + SF_E,P_TMP =3D sfinvsqrta(SFRAD)=0A= + SFHALF =3D and(SFHALF,#-16)=0A= + SFSH =3D #0=0A= + }=0A= +#undef A=0A= +#undef AH=0A= +#undef AL=0A= +#define ERROR r1:0=0A= +#define ERRORHI r1=0A= +#define ERRORLO r0=0A= + // SF_E : reciprocal square root=0A= + // SF_H : half rsqrt=0A= + // sf_S : square root=0A= + // SF_D : error term=0A= + // SFHALF: 0.5=0A= + {=0A= + SF_S +=3D sfmpy(SF_E,SFRAD):lib // s0: root=0A= + SF_H +=3D sfmpy(SF_E,SFHALF):lib // h0: 0.5*y0. Could also decrement = exponent...=0A= + SF_D =3D SFHALF=0A= +#undef SFRAD=0A= +#define SHIFTAMT r9=0A= + SHIFTAMT =3D and(EXP,#1)=0A= + }=0A= + {=0A= + SF_D -=3D sfmpy(SF_S,SF_H):lib // d0: 0.5-H*S =3D 0.5-0.5*~1=0A= + FRACRADH =3D insert(S_ONE,#DF_EXPBITS+1,#DF_MANTBITS-32) // replace = upper bits with hidden=0A= + P_EXP1 =3D cmp.gtu(SHIFTAMT,#0)=0A= + }=0A= + {=0A= + SF_S +=3D sfmpy(SF_S,SF_D):lib // s1: refine sqrt=0A= + SF_H +=3D sfmpy(SF_H,SF_D):lib // h1: refine half-recip=0A= + SF_D =3D SFHALF=0A= + SHIFTAMT =3D mux(P_EXP1,#8,#9)=0A= + }=0A= + {=0A= + SF_D -=3D sfmpy(SF_S,SF_H):lib // d1: error term=0A= + FRACRAD =3D asl(FRACRAD,SHIFTAMT) // Move fracrad bits to right place=0A= + SHIFTAMT =3D mux(P_EXP1,#3,#2)=0A= + }=0A= + {=0A= + SF_H +=3D sfmpy(SF_H,SF_D):lib // d2: rsqrt=0A= + // cool trick: half of 1/sqrt(x) has same mantissa as 1/sqrt(x).=0A= + PROD =3D asl(FRACRAD,SHIFTAMT) // fracrad<<(2+exp1)=0A= + }=0A= + {=0A= + SF_H =3D and(SF_H,##0x007fffff)=0A= + }=0A= + {=0A= + SF_H =3D add(SF_H,##0x00800000 - 3)=0A= + SHIFTAMT =3D mux(P_EXP1,#7,#8)=0A= + }=0A= + {=0A= + RECIPEST =3D asl(SF_H,SHIFTAMT)=0A= + SHIFTAMT =3D mux(P_EXP1,#15-(1+1),#15-(1+0))=0A= + }=0A= + {=0A= + ROOT =3D mpyu(RECIPEST,PRODHI) // root =3D = mpyu_full(recipest,hi(fracrad<<(2+exp1)))=0A= + }=0A= +=0A= +#undef SFSH // r3:2=0A= +#undef SF_H // r2=0A= +#undef SF_S // r3=0A= +#undef S_ONE // r4=0A= +#undef SFHALF // r5=0A= +#undef SFHALF_SONE // r5:4=0A= +#undef SF_D // r6=0A= +#undef SF_E // r7=0A= +=0A= +#define HL r3:2=0A= +#define LL r5:4=0A= +#define HH r7:6=0A= +=0A= +#undef P_EXP1=0A= +#define P_CARRY0 p1=0A= +#define P_CARRY1 p2=0A= +#define P_CARRY2 p3=0A= +=0A= + /* Iteration 0 */=0A= + /* Maybe we can save a cycle by starting with ERROR=3Dasl(fracrad), = then as we multiply */=0A= + /* We can shift and subtract instead of shift and add? */=0A= + {=0A= + ERROR =3D asl(FRACRAD,#15)=0A= + PROD =3D mpyu(ROOTHI,ROOTHI)=0A= + P_CARRY0 =3D cmp.eq(r0,r0)=0A= + }=0A= + {=0A= + ERROR -=3D asl(PROD,#15)=0A= + PROD =3D mpyu(ROOTHI,ROOTLO)=0A= + P_CARRY1 =3D cmp.eq(r0,r0)=0A= + }=0A= + {=0A= + ERROR -=3D lsr(PROD,#16)=0A= + P_CARRY2 =3D cmp.eq(r0,r0)=0A= + }=0A= + {=0A= + ERROR =3D mpyu(ERRORHI,RECIPEST)=0A= + }=0A= + {=0A= + ROOT +=3D lsr(ERROR,SHIFTAMT)=0A= + SHIFTAMT =3D add(SHIFTAMT,#16)=0A= + ERROR =3D asl(FRACRAD,#31) // for next iter=0A= + }=0A= + /* Iteration 1 */=0A= + {=0A= + PROD =3D mpyu(ROOTHI,ROOTHI)=0A= + ERROR -=3D mpyu(ROOTHI,ROOTLO) // amount is 31, no shift needed=0A= + }=0A= + {=0A= + ERROR -=3D asl(PROD,#31)=0A= + PROD =3D mpyu(ROOTLO,ROOTLO)=0A= + }=0A= + {=0A= + ERROR -=3D lsr(PROD,#33)=0A= + }=0A= + {=0A= + ERROR =3D mpyu(ERRORHI,RECIPEST)=0A= + }=0A= + {=0A= + ROOT +=3D lsr(ERROR,SHIFTAMT)=0A= + SHIFTAMT =3D add(SHIFTAMT,#16)=0A= + ERROR =3D asl(FRACRAD,#47) // for next iter=0A= + }=0A= + /* Iteration 2 */=0A= + {=0A= + PROD =3D mpyu(ROOTHI,ROOTHI)=0A= + }=0A= + {=0A= + ERROR -=3D asl(PROD,#47)=0A= + PROD =3D mpyu(ROOTHI,ROOTLO)=0A= + }=0A= + {=0A= + ERROR -=3D asl(PROD,#16) // bidir shr 31-47=0A= + PROD =3D mpyu(ROOTLO,ROOTLO)=0A= + }=0A= + {=0A= + ERROR -=3D lsr(PROD,#17) // 64-47=0A= + }=0A= + {=0A= + ERROR =3D mpyu(ERRORHI,RECIPEST)=0A= + }=0A= + {=0A= + ROOT +=3D lsr(ERROR,SHIFTAMT)=0A= + }=0A= +#undef ERROR=0A= +#undef PROD=0A= +#undef PRODHI=0A= +#undef PRODLO=0A= +#define REM_HI r15:14=0A= +#define REM_HI_HI r15=0A= +#define REM_LO r1:0=0A= +#undef RECIPEST=0A= +#undef SHIFTAMT=0A= +#define TWOROOT_LO r9:8=0A= + /* Adjust Root */=0A= + {=0A= + HL =3D mpyu(ROOTHI,ROOTLO)=0A= + LL =3D mpyu(ROOTLO,ROOTLO)=0A= + REM_HI =3D #0=0A= + REM_LO =3D #0=0A= + }=0A= + {=0A= + HL +=3D lsr(LL,#33)=0A= + LL +=3D asl(HL,#33)=0A= + P_CARRY0 =3D cmp.eq(r0,r0)=0A= + }=0A= + {=0A= + HH =3D mpyu(ROOTHI,ROOTHI)=0A= + REM_LO =3D sub(REM_LO,LL,P_CARRY0):carry=0A= + TWOROOT_LO =3D #1=0A= + }=0A= + {=0A= + HH +=3D lsr(HL,#31)=0A= + TWOROOT_LO +=3D asl(ROOT,#1)=0A= + }=0A= +#undef HL=0A= +#undef LL=0A= +#define REM_HI_TMP r3:2=0A= +#define REM_HI_TMP_HI r3=0A= +#define REM_LO_TMP r5:4=0A= + {=0A= + REM_HI =3D sub(FRACRAD,HH,P_CARRY0):carry=0A= + REM_LO_TMP =3D sub(REM_LO,TWOROOT_LO,P_CARRY1):carry=0A= +#undef FRACRAD=0A= +#undef HH=0A= +#define ZERO r11:10=0A= +#define ONE r7:6=0A= + ONE =3D #1=0A= + ZERO =3D #0=0A= + }=0A= + {=0A= + REM_HI_TMP =3D sub(REM_HI,ZERO,P_CARRY1):carry=0A= + ONE =3D add(ROOT,ONE)=0A= + EXP =3D add(EXP,#-DF_BIAS) // subtract bias --> signed exp=0A= + }=0A= + {=0A= + // If carry set, no borrow: result was still positive=0A= + if (P_CARRY1) ROOT =3D ONE=0A= + if (P_CARRY1) REM_LO =3D REM_LO_TMP=0A= + if (P_CARRY1) REM_HI =3D REM_HI_TMP=0A= + }=0A= + {=0A= + REM_LO_TMP =3D sub(REM_LO,TWOROOT_LO,P_CARRY2):carry=0A= + ONE =3D #1=0A= + EXP =3D asr(EXP,#1) // divide signed exp by 2=0A= + }=0A= + {=0A= + REM_HI_TMP =3D sub(REM_HI,ZERO,P_CARRY2):carry=0A= + ONE =3D add(ROOT,ONE)=0A= + }=0A= + {=0A= + if (P_CARRY2) ROOT =3D ONE=0A= + if (P_CARRY2) REM_LO =3D REM_LO_TMP=0A= + // since tworoot <=3D 2^32, remhi must be zero=0A= +#undef REM_HI_TMP=0A= +#undef REM_HI_TMP_HI=0A= +#define S_ONE r2=0A= +#define ADJ r3=0A= + S_ONE =3D #1=0A= + }=0A= + {=0A= + P_TMP =3D cmp.eq(REM_LO,ZERO) // is the low part zero=0A= + if (!P_TMP.new) ROOTLO =3D or(ROOTLO,S_ONE) // if so, it's exact... = hopefully=0A= + ADJ =3D cl0(ROOT)=0A= + EXP =3D add(EXP,#-63)=0A= + }=0A= +#undef REM_LO=0A= +#define RET r1:0=0A= +#define RETHI r1=0A= + {=0A= + RET =3D convert_ud2df(ROOT) // set up mantissa, maybe set inexact = flag=0A= + EXP =3D add(EXP,ADJ) // add back bias=0A= + }=0A= + {=0A= + RETHI +=3D asl(EXP,#DF_MANTBITS-32) // add exponent adjust=0A= + jumpr r31=0A= + }=0A= +#undef REM_LO_TMP=0A= +#undef REM_HI_TMP=0A= +#undef REM_HI_TMP_HI=0A= +#undef REM_LO=0A= +#undef REM_HI=0A= +#undef TWOROOT_LO=0A= +=0A= +#undef RET=0A= +#define A r1:0=0A= +#define AH r1=0A= +#define AL r1=0A= +#undef S_ONE=0A= +#define TMP r3:2=0A= +#define TMPHI r3=0A= +#define TMPLO r2=0A= +#undef P_CARRY0=0A= +#define P_NEG p1=0A= +=0A= +=0A= +#define SFHALF r5=0A= +#define SFRAD r9=0A= +.Lsqrt_abnormal:=0A= + {=0A= + P_TMP =3D dfclass(A,#DFCLASS_ZERO) // zero?=0A= + if (P_TMP.new) jumpr:t r31=0A= + }=0A= + {=0A= + P_TMP =3D dfclass(A,#DFCLASS_NAN)=0A= + if (P_TMP.new) jump:nt .Lsqrt_nan=0A= + }=0A= + {=0A= + P_TMP =3D cmp.gt(AH,#-1)=0A= + if (!P_TMP.new) jump:nt .Lsqrt_invalid_neg=0A= + if (!P_TMP.new) EXP =3D ##0x7F800001 // sNaN=0A= + }=0A= + {=0A= + P_TMP =3D dfclass(A,#DFCLASS_INFINITE)=0A= + if (P_TMP.new) jumpr:nt r31=0A= + }=0A= + // If we got here, we're denormal=0A= + // prepare to restart=0A= + {=0A= + A =3D extractu(A,#DF_MANTBITS,#0) // Extract mantissa=0A= + }=0A= + {=0A= + EXP =3D add(clb(A),#-DF_EXPBITS) // how much to normalize?=0A= + }=0A= + {=0A= + A =3D asl(A,EXP) // Shift mantissa=0A= + EXP =3D sub(#1,EXP) // Form exponent=0A= + }=0A= + {=0A= + AH =3D insert(EXP,#1,#DF_MANTBITS-32) // insert lsb of exponent=0A= + }=0A= + {=0A= + TMP =3D extractu(A,#SF_MANTBITS+1,#DF_MANTBITS-SF_MANTBITS) // get sf = value (mant+exp1)=0A= + SFHALF =3D ##0x3f000004 // form half constant=0A= + }=0A= + {=0A= + SFRAD =3D or(SFHALF,TMPLO) // form sf value=0A= + SFHALF =3D and(SFHALF,#-16)=0A= + jump .Ldenormal_restart // restart=0A= + }=0A= +.Lsqrt_nan:=0A= + {=0A= + EXP =3D convert_df2sf(A) // if sNaN, get invalid=0A= + A =3D #-1 // qNaN=0A= + jumpr r31=0A= + }=0A= +.Lsqrt_invalid_neg:=0A= + {=0A= + A =3D convert_sf2df(EXP) // Invalid,NaNval=0A= + jumpr r31=0A= + }=0A= +=0A= + .size sqrt, . - sqrt=0A= diff --git a/src/setjmp/hexagon/longjmp.s b/src/setjmp/hexagon/longjmp.s=0A= new file mode 100644=0A= index 00000000..691b67dd=0A= --- /dev/null=0A= +++ b/src/setjmp/hexagon/longjmp.s=0A= @@ -0,0 +1,25 @@=0A= +.text=0A= +.global _longjmp=0A= +.global longjmp=0A= +.type _longjmp,%function=0A= +.type longjmp,%function=0A= +_longjmp:=0A= +longjmp:=0A= + { r17:16=3Dmemd(r0+#0)=0A= + r19:18=3Dmemd(r0+#8) }=0A= + { r21:20=3Dmemd(r0+#16)=0A= + r23:22=3Dmemd(r0+#24) }=0A= + { r25:24=3Dmemd(r0+#32)=0A= + r27:26=3Dmemd(r0+#40) }=0A= + { r29:28=3Dmemd(r0+#48)=0A= + r31:30=3Dmemd(r0+#56) }=0A= +=0A= + r0 =3D r1=0A= + r1 =3D #0=0A= + p0 =3D cmp.eq(r0,r1)=0A= + if (!p0) jumpr r31=0A= + r0 =3D #1=0A= +=0A= + jumpr r31=0A= +.size _longjmp, .-_longjmp=0A= +.size longjmp, .-longjmp=0A= diff --git a/src/setjmp/hexagon/setjmp.s b/src/setjmp/hexagon/setjmp.s=0A= new file mode 100644=0A= index 00000000..d29f036e=0A= --- /dev/null=0A= +++ b/src/setjmp/hexagon/setjmp.s=0A= @@ -0,0 +1,24 @@=0A= +.text=0A= +.global __setjmp=0A= +.global _setjmp=0A= +.global setjmp=0A= +.type __setjmp,@function=0A= +.type _setjmp,@function=0A= +.type setjmp,@function=0A= +__setjmp:=0A= +_setjmp:=0A= +setjmp:=0A= + { memd(r0+#0)=3Dr17:16=0A= + memd(r0+#8)=3Dr19:18 }=0A= + { memd(r0+#16)=3Dr21:20=0A= + memd(r0+#24)=3Dr23:22 }=0A= + { memd(r0+#32)=3Dr25:24=0A= + memd(r0+#40)=3Dr27:26 }=0A= + { memd(r0+#48)=3Dr29:28=0A= + memd(r0+#56)=3Dr31:30 }=0A= +=0A= + r0 =3D #0=0A= + jumpr r31=0A= +.size __setjmp, .-__setjmp=0A= +.size _setjmp, .-_setjmp=0A= +.size setjmp, .-setjmp=0A= diff --git a/src/signal/hexagon/restore.s b/src/signal/hexagon/restore.s=0A= new file mode 100644=0A= index 00000000..f43f5e02=0A= --- /dev/null=0A= +++ b/src/signal/hexagon/restore.s=0A= @@ -0,0 +1,11 @@=0A= +// TODO - Test this if sa_restorer is ever supported in our kernel=0A= +.global __restore=0A= +.type __restore,%function=0A= +.global __restore_rt=0A= +.type __restore_rt,%function=0A= +__restore:=0A= +__restore_rt:=0A= + r6 =3D #139 // SYS_rt_sigreturn=0A= + trap0(#0)=0A= +.size __restore, .-__restore=0A= +.size __restore_rt, .-__restore_rt=0A= diff --git a/src/signal/hexagon/siglongjmp.c = b/src/signal/hexagon/siglongjmp.c=0A= new file mode 100644=0A= index 00000000..d9d52abd=0A= --- /dev/null=0A= +++ b/src/signal/hexagon/siglongjmp.c=0A= @@ -0,0 +1,15 @@=0A= +#include =0A= +#include =0A= +#include "syscall.h"=0A= +#include "pthread_impl.h"=0A= +=0A= +_Noreturn void siglongjmp(sigjmp_buf buf, int ret)=0A= +{=0A= +#if defined (__hexagon__)=0A= + // TODO - The following two lines were added=0A= + // Figure out why they weren't in the original source=0A= + if (buf->__fl)=0A= + pthread_sigmask(SIG_SETMASK, (sigset_t *)buf->__ss, NULL);=0A= +#endif=0A= + longjmp(buf, ret);=0A= +}=0A= diff --git a/src/signal/hexagon/sigsetjmp.s = b/src/signal/hexagon/sigsetjmp.s=0A= new file mode 100644=0A= index 00000000..3afac01f=0A= --- /dev/null=0A= +++ b/src/signal/hexagon/sigsetjmp.s=0A= @@ -0,0 +1,34 @@=0A= + .text=0A= + .globl sigsetjmp=0A= + .balign 4=0A= + .type sigsetjmp,@function=0A= +sigsetjmp:=0A= + {=0A= + p0 =3D cmp.eq(r1, #0)=0A= + r16 =3D r0=0A= + memd(r29 + #-16) =3D r17:16=0A= + allocframe(#8)=0A= + }=0A= + {=0A= + if (p0) jump 1f=0A= + if (!p0) r2 =3D add(r16, #68)=0A= + memw(r16+#64) =3D r1=0A= + }=0A= + {=0A= + call pthread_sigmask=0A= + r1:0 =3D combine(#0, #2)=0A= + }=0A= +1:=0A= + {=0A= + r0 =3D r16=0A= + r17:16 =3D memd(r29 + #0)=0A= + deallocframe=0A= + }=0A= + {=0A= + jump setjmp=0A= + }=0A= + .size sigsetjmp, .-sigsetjmp=0A= +=0A= +=0A= +.weak __sigsetjmp=0A= +.set __sigsetjmp, sigsetjmp=0A= diff --git a/src/thread/hexagon/__set_thread_area.s = b/src/thread/hexagon/__set_thread_area.s=0A= new file mode 100644=0A= index 00000000..87a991b7=0A= --- /dev/null=0A= +++ b/src/thread/hexagon/__set_thread_area.s=0A= @@ -0,0 +1,7 @@=0A= +.global __set_thread_area=0A= +.type __set_thread_area,@function=0A= +__set_thread_area:=0A= + { ugp =3D r0=0A= + r0 =3D #0=0A= + jumpr r31 }=0A= +.size __set_thread_area, .-__set_thread_area=0A= diff --git a/src/thread/hexagon/__unmapself.s = b/src/thread/hexagon/__unmapself.s=0A= new file mode 100644=0A= index 00000000..c47dce21=0A= --- /dev/null=0A= +++ b/src/thread/hexagon/__unmapself.s=0A= @@ -0,0 +1,11 @@=0A= +#include =0A= +=0A= +.global __unmapself=0A= +.type __unmapself,%function=0A= +__unmapself:=0A= + r6 =3D #215 // SYS_munmap=0A= + trap0(#1)=0A= + r6 =3D #93 // SYS_exit=0A= + trap0(#1)=0A= + jumpr r31=0A= +.size __unmapself, .-__unmapself=0A= diff --git a/src/thread/hexagon/clone.s b/src/thread/hexagon/clone.s=0A= new file mode 100644=0A= index 00000000..42aab67a=0A= --- /dev/null=0A= +++ b/src/thread/hexagon/clone.s=0A= @@ -0,0 +1,37 @@=0A= +// __clone(func, stack, flags, arg, ptid, tls, ctid)=0A= +// r0, r1, r2, r3, r4, r5, stack=0A= +=0A= +// tid =3D syscall(SYS_clone, flags, stack, ptid, ctid, tls)=0A= +// r6, r0, r1, r2, r3, r4=0A= +// if (tid !=3D 0) return=0A= +// func(arg)=0A= +// syscall(SYS_exit)=0A= +=0A= +.text=0A= +.global __clone=0A= +.type __clone,%function=0A= +__clone:=0A= + allocframe(#8)=0A= + // Save pointers for later=0A= + { r11 =3D r0=0A= + r10 =3D r3 }=0A= +=0A= + // Set up syscall args - The stack must be 8 byte aligned.=0A= + { r0 =3D r2=0A= + r1 =3D and(r1, ##0xfffffff8)=0A= + r2 =3D r4 }=0A= + {=0A= + r3 =3D memw(r30+#8)=0A= + r4 =3D r5 }=0A= + r6 =3D #220 // SYS_clone=0A= + trap0(#1)=0A= +=0A= + p0 =3D cmp.eq(r0, #0)=0A= + if (!p0) dealloc_return=0A= +=0A= + { r0 =3D r10=0A= + callr r11 }=0A= +=0A= + r6 =3D #93 // SYS_exit=0A= + trap0(#1)=0A= +.size __clone, .-__clone=0A= diff --git a/src/thread/hexagon/syscall_cp.s = b/src/thread/hexagon/syscall_cp.s=0A= new file mode 100644=0A= index 00000000..50383cad=0A= --- /dev/null=0A= +++ b/src/thread/hexagon/syscall_cp.s=0A= @@ -0,0 +1,35 @@=0A= +// __syscall_cp_asm(&self->cancel, nr, u, v, w, x, y, z)=0A= +// r0 r1 r2 r3 r4 r5 stack stack=0A= +=0A= +// syscall(nr, u, v, w, x, y, z)=0A= +// r6 r0 r1 r2 r3 r4 r5=0A= +=0A= +.text=0A= +.global __cp_begin=0A= +.hidden __cp_begin=0A= +.global __cp_end=0A= +.hidden __cp_end=0A= +.global __cp_cancel=0A= +.hidden __cp_cancel=0A= +.hidden __cancel=0A= +.global __syscall_cp_asm=0A= +.hidden __syscall_cp_asm=0A= +.type __syscall_cp_asm,%function=0A= +__syscall_cp_asm:=0A= +__cp_begin:=0A= + r0 =3D memw(r0+#0)=0A= + {=0A= + p0 =3D cmp.eq(r0, #0); if (!p0.new) jump:nt __cancel=0A= + }=0A= + { r6 =3D r1=0A= + r1:0 =3D combine(r3, r2)=0A= + r3:2 =3D combine(r5, r4) }=0A= + { r4 =3D memw(r29+#0)=0A= + r5 =3D memw(r29+#4) }=0A= + trap0(#1)=0A= +__cp_end:=0A= + jumpr r31=0A= +.size __syscall_cp_asm, .-__syscall_cp_asm=0A= +__cp_cancel:=0A= + jump __cancel=0A= +.size __cp_cancel, .-__cp_cancel=0A= =A6=92=02=10=80=01=00=16=00=00=00musl-add-hexagon.diff=00=F5=07=02=11=80=06= =00=B8=0D=00=00=01=00 = =00=00=03=DC=06=00=00=00=00!=06=00=00=00=00=05=00=00=00 = =02=00=00=00=00=05=00=00=00=01=02=FF=FF=FF=00=A5=00=00=00A=0B=C6=00=88=00= =00 =00=00=00=00=00 =00 =00=00=00=00=00(=00=00=00 = =00=00=00@=00=00=00=01=00=01=00=00=00=00=00=00=01=00=00=00=00=00=00=00=00= =00=00=00=00=00=00=00=00=00=00=00=00=00=00=FF=FF=FF=00=00=00=00=00=00=00=00= =00=00=00=00=00=00=00=00=00=00=00=00=00=00=00=00=00=00=00=00=00=00=00=00=00= =00=00=00=00=00=00=00=00=00=00=00=00=00=00=00=00=00=00=00=00=00=00=00=00=00= =00=00=00=00=00=00=00=00=00=00=00=00=00=00=00=00=00=00=00=00=00=00=00=00=00= =00=00=00=00=00=00=00=00=00=00=00=00=00=00=00=00=00=00=00=00=00=00=00=00=00= =00=00=00=00=00=00=00=00=00=00=00=00=00=00=00=00=00=00=00=00=00=FF=FF=FF=FF= =FF=FF=FF=FF=F8=00=00?=F8=00=00?=F8=00=00?=F8=00=00?=F8=00=00?=F8=00=00?=F8= =00=00?=F8=00=00?=F8=00=00?=F8=00=00?=F8=00=00?=F8=00=00?=F8=00=00?=F8=00= =00?=F8=00=00?=F8=00=00?=F8=00=00?=F8=00=00?=F8=00=00?=F8=00=00?=F8=00=00= ?=F8=00=00?=F8=00=00?=F8=00=00?=F8=00=00?=F8=00=00=7F=F8=00=00=FF=F8=00=01= =FF=FF=FF=FF=FF=FF=FF=FF=FF!=06=00=00A=0BF=00f=00 =00 =00=00=00=00=00 = =00 =00=00=00=00=00(=00=00=00 =00=00=00 = =00=00=00=01=00=18=00=00=00=00=00=00=0C=00=00=00=00=00=00=00=00=00=00=00=00= =00=00=00=00=00=00=00=00=00=00=00=00=00=00=00=00=00=00=00=00=00=00=00=00=00= =00=00=00=00=00=00=00=00=00=00=00=00=00=00=00=00=00=00=00=00=00=00=00=00=00= =00=00=00=00=00=00=00=00=00=00=00=00=00=00=00=00=00=00=00=00=00=00=00=00=00= =00=00=00=00=00=00=00=00=00=00=00=00=00=00=00=00=00=00=00=00=00=00=00=00=00= =00=00=00=00=00=00=00=00=00=00=00=00=00=00=00=00=00=00=00=00=00=00=00=00=00= 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