From mboxrd@z Thu Jan 1 00:00:00 1970 X-Msuck: nntp://news.gmane.org/gmane.linux.lib.musl.general/3337 Path: news.gmane.org!not-for-mail From: Rob Landley Newsgroups: gmane.linux.lib.musl.general Subject: Re: cpuset/affinity interfaces and TSX lock elision in musl Date: Sat, 18 May 2013 23:12:10 -0500 Message-ID: <1368936730.2611.2@driftwood> References: Reply-To: musl@lists.openwall.com NNTP-Posting-Host: plane.gmane.org Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8; DelSp=Yes; Format=Flowed Content-Transfer-Encoding: quoted-printable X-Trace: ger.gmane.org 1368936745 12552 80.91.229.3 (19 May 2013 04:12:25 GMT) X-Complaints-To: usenet@ger.gmane.org NNTP-Posting-Date: Sun, 19 May 2013 04:12:25 +0000 (UTC) Cc: musl@lists.openwall.com To: musl@lists.openwall.com Original-X-From: musl-return-3341-gllmg-musl=m.gmane.org@lists.openwall.com Sun May 19 06:12:26 2013 Return-path: Envelope-to: gllmg-musl@plane.gmane.org Original-Received: from mother.openwall.net ([195.42.179.200]) by plane.gmane.org with smtp (Exim 4.69) (envelope-from ) id 1Uduyv-0001ZI-O3 for gllmg-musl@plane.gmane.org; Sun, 19 May 2013 06:12:25 +0200 Original-Received: (qmail 22343 invoked by uid 550); 19 May 2013 04:12:25 -0000 Mailing-List: contact musl-help@lists.openwall.com; run by ezmlm Precedence: bulk List-Post: List-Help: List-Unsubscribe: List-Subscribe: Original-Received: (qmail 22335 invoked from network); 19 May 2013 04:12:25 -0000 X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=x-received:date:from:subject:to:cc:in-reply-to:x-mailer:message-id :mime-version:content-type:content-disposition :content-transfer-encoding:x-gm-message-state; bh=1H8VsoLRo0FcpmeG3upzHV/4ZV30Y/bJyCm8SBkxoDI=; b=C2WAGwPL5O/sIglrPycx0rOqTGO8q8FTLA24ecju/TrL1MY6sPdtYzTOmr7N2U4dk6 n2kIAYacVOtTzVvVagHpK418j6JI/cBXgpT30xu/64WQtziq9OKXJck00sNndaXbO0wJ Ch9aig20ve6EzLpkEXCIE00ots3Z8ygNQ53e+i2VXCy1+TDQONsnpaXo88D4l/9SoMkl Z9/Uc4ux9vKML7AZgocUDJVpD2+yhgpJL3f9yaGXIQLBeqjK7JeFzYZnisr5g/LUyQe8 wFYq3ITYT5VecUBvFA7+A64oSgPq6PelC/dX1mSA9vCEG7JiL/Q2SFyr8LcA4r07t9GR RSrw== X-Received: by 10.50.15.166 with SMTP id y6mr2313348igc.83.1368936732874; Sat, 18 May 2013 21:12:12 -0700 (PDT) In-Reply-To: (from daniel.cegielka@gmail.com on Fri May 17 02:41:18 2013) X-Mailer: Balsa 2.4.11 Content-Disposition: inline X-Gm-Message-State: ALoCoQknOrfIG1c9c/lPPl2a+IyuoNFG55F8jQVbD1+jQXBs1tWGD6CTG6/Okw+mYbLdbr8ZDTNI Xref: news.gmane.org gmane.linux.lib.musl.general:3337 Archived-At: On 05/17/2013 02:41:18 AM, Daniel Cegie=C5=82ka wrote: > Rich, Rob - thanks for the information. This is functionality that > sooner or later, but it is worth to add to the musl. >=20 > >> 2) The upcoming glibc will have support for TSX lock elision. > >> > >> =20 > http://en.wikipedia.org/wiki/Transactional_Synchronization_Extensions > >> > >> http://lwn.net/Articles/534761/ > >> > >> Are there any outlook that we can support TSX lock elision in musl? > > > > I was involved in the discussions about lock elision on the glibc > > mailing list, and from what I could gather, it's a pain to implement > > and whether it brings you any benefit is questionable. >=20 > There is currently no hardware support, so the tests were done in the > emulator. It's too early to say there's is no performance gain. >=20 > > Before making > > any decision, I think we should wait to see some performance =20 > figures. >=20 > musl is described as libc for embedded systems (raspberry pi, small > routers, mobile etc.). Summing up: low-end hardware. Where is it described that way? That wasn't my impression: it was a =20 simple generic C library for Linux and Android. We should be able to =20 build desktops with it just fine. > I think musl is > the ideal solution for high-end HPC servers etc., so that's why we > should support innovative solutions (like TSX lock elision). HPC and embedded are closer to each other than either is to the =20 desktop. They race to completion, we race to quiescence on underpowered =20 hardware; neither has persistent processes but more of a batch =20 mentality. We keep power consumption down to extend battery life, they =20 keep power consumption down because heat dissipation costs more than =20 the hardware... Right now I'm in month 4 of a 6 month contract at Cray, the =20 supercomputer company. (No, not the one SGI bought: it split in two =20 when Seymour Cray retired and they gave him a $100 million research lab =20 as a retirement present. The half SGI _didn't_ buy expanded back into =20 the space and is again supercomputing in the big leagues.) > We may > also ask manufacturers (such as Intel) for help with optimization > (they really help with glibc and gcc). Worry about target-specific optimization after 1.0. Until then it's =20 premature optimization. Right now target-independent optimization seems =20 more interesting. (To me, anyway.) Rob=