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From: Andre McCurdy <armccurdy@gmail.com>
To: musl@lists.openwall.com
Cc: Andre McCurdy <armccurdy@gmail.com>
Subject: [PATCH 1/2] remove a_ctz_l from arch specific atomic_arch.h
Date: Wed, 18 Apr 2018 17:40:59 -0700	[thread overview]
Message-ID: <1524098460-8072-2-git-send-email-armccurdy@gmail.com> (raw)
In-Reply-To: <1524098460-8072-1-git-send-email-armccurdy@gmail.com>

Update atomic.h to provide a_ctz_l in all cases (atomic_arch.h should
now only provide a_ctz_32 and/or a_ctz_64).

The generic version of a_ctz_32 now takes advantage of a_clz_32 if
available and the generic a_ctz_64 now makes use of a_ctz_32.
---
 arch/i386/atomic_arch.h |  6 +++---
 arch/x32/atomic_arch.h  |  4 ++--
 src/internal/atomic.h   | 42 +++++++++++++++++++++++-------------------
 3 files changed, 28 insertions(+), 24 deletions(-)

diff --git a/arch/i386/atomic_arch.h b/arch/i386/atomic_arch.h
index 7d2a48a..047fb68 100644
--- a/arch/i386/atomic_arch.h
+++ b/arch/i386/atomic_arch.h
@@ -92,10 +92,10 @@ static inline int a_ctz_64(uint64_t x)
 	return r;
 }
 
-#define a_ctz_l a_ctz_l
-static inline int a_ctz_l(unsigned long x)
+#define a_ctz_32 a_ctz_32
+static inline int a_ctz_32(uint32_t x)
 {
-	long r;
+	int r;
 	__asm__( "bsf %1,%0" : "=r"(r) : "r"(x) );
 	return r;
 }
diff --git a/arch/x32/atomic_arch.h b/arch/x32/atomic_arch.h
index a744c29..918c2d4 100644
--- a/arch/x32/atomic_arch.h
+++ b/arch/x32/atomic_arch.h
@@ -106,8 +106,8 @@ static inline int a_ctz_64(uint64_t x)
 	return x;
 }
 
-#define a_ctz_l a_ctz_l
-static inline int a_ctz_l(unsigned long x)
+#define a_ctz_32 a_ctz_32
+static inline int a_ctz_32(uint32_t x)
 {
 	__asm__( "bsf %1,%0" : "=r"(x) : "r"(x) );
 	return x;
diff --git a/src/internal/atomic.h b/src/internal/atomic.h
index ab473dd..f938879 100644
--- a/src/internal/atomic.h
+++ b/src/internal/atomic.h
@@ -251,6 +251,22 @@ static inline void a_crash()
 }
 #endif
 
+#ifndef a_ctz_32
+#define a_ctz_32 a_ctz_32
+static inline int a_ctz_32(uint32_t x)
+{
+#ifdef a_clz_32
+	return 31-a_clz_32(x&-x);
+#else
+	static const char debruijn32[32] = {
+		0, 1, 23, 2, 29, 24, 19, 3, 30, 27, 25, 11, 20, 8, 4, 13,
+		31, 22, 28, 18, 26, 10, 7, 12, 21, 17, 9, 6, 16, 5, 15, 14
+	};
+	return debruijn32[(x&-x)*0x076be629 >> 27];
+#endif
+}
+#endif
+
 #ifndef a_ctz_64
 #define a_ctz_64 a_ctz_64
 static inline int a_ctz_64(uint64_t x)
@@ -261,22 +277,23 @@ static inline int a_ctz_64(uint64_t x)
 		63, 52, 6, 26, 37, 40, 33, 47, 61, 45, 43, 21, 23, 58, 17, 10,
 		51, 25, 36, 32, 60, 20, 57, 16, 50, 31, 19, 15, 30, 14, 13, 12
 	};
-	static const char debruijn32[32] = {
-		0, 1, 23, 2, 29, 24, 19, 3, 30, 27, 25, 11, 20, 8, 4, 13,
-		31, 22, 28, 18, 26, 10, 7, 12, 21, 17, 9, 6, 16, 5, 15, 14
-	};
 	if (sizeof(long) < 8) {
 		uint32_t y = x;
 		if (!y) {
 			y = x>>32;
-			return 32 + debruijn32[(y&-y)*0x076be629 >> 27];
+			return 32 + a_ctz_32(y);
 		}
-		return debruijn32[(y&-y)*0x076be629 >> 27];
+		return a_ctz_32(y);
 	}
 	return debruijn64[(x&-x)*0x022fdd63cc95386dull >> 58];
 }
 #endif
 
+static inline int a_ctz_l(unsigned long x)
+{
+	return (sizeof(long) < 8) ? a_ctz_32(x) : a_ctz_64(x);
+}
+
 #ifndef a_clz_64
 #define a_clz_64 a_clz_64
 static inline int a_clz_64(uint64_t x)
@@ -298,17 +315,4 @@ static inline int a_clz_64(uint64_t x)
 }
 #endif
 
-#ifndef a_ctz_l
-#define a_ctz_l a_ctz_l
-static inline int a_ctz_l(unsigned long x)
-{
-	static const char debruijn32[32] = {
-		0, 1, 23, 2, 29, 24, 19, 3, 30, 27, 25, 11, 20, 8, 4, 13,
-		31, 22, 28, 18, 26, 10, 7, 12, 21, 17, 9, 6, 16, 5, 15, 14
-	};
-	if (sizeof(long) == 8) return a_ctz_64(x);
-	return debruijn32[(x&-x)*0x076be629 >> 27];
-}
-#endif
-
 #endif
-- 
1.9.1



  reply	other threads:[~2018-04-19  0:40 UTC|newest]

Thread overview: 3+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-04-19  0:40 [PATCH 0/2] a_ctz optimisations Andre McCurdy
2018-04-19  0:40 ` Andre McCurdy [this message]
2018-04-19  0:41 ` [PATCH 2/2] provide a_ctz_32 helper Andre McCurdy

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