From mboxrd@z Thu Jan 1 00:00:00 1970 X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on inbox.vuxu.org X-Spam-Level: X-Spam-Status: No, score=-3.1 required=5.0 tests=DKIM_ADSP_CUSTOM_MED, DKIM_INVALID,DKIM_SIGNED,FREEMAIL_FROM,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED,RCVD_IN_MSPIKE_H3,RCVD_IN_MSPIKE_WL,SPF_PASS autolearn=ham autolearn_force=no version=3.4.2 Received: (qmail 24703 invoked from network); 15 Apr 2020 21:47:08 -0000 Received-SPF: pass (mother.openwall.net: domain of lists.openwall.com designates 195.42.179.200 as permitted sender) receiver=inbox.vuxu.org; client-ip=195.42.179.200 envelope-from= Received: from mother.openwall.net (195.42.179.200) by inbox.vuxu.org with UTF8ESMTPZ; 15 Apr 2020 21:47:08 -0000 Received: (qmail 5817 invoked by uid 550); 15 Apr 2020 21:47:06 -0000 Mailing-List: contact musl-help@lists.openwall.com; run by ezmlm Precedence: bulk List-Post: List-Help: List-Unsubscribe: List-Subscribe: List-ID: Reply-To: musl@lists.openwall.com Received: (qmail 5596 invoked from network); 15 Apr 2020 21:45:42 -0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=date:from:subject:to:cc:mime-version:message-id :content-transfer-encoding; bh=AEaYw32qnHlvF+/j3/Jvpgo3bfQkRcMMSHiXyI3G7Uw=; b=ooWXTcG2n+F1Ludh7geY+v152Ci0b/SMH/EjqYeA6vMhJ9cH4deQTmEUOcQe9yEDqb HAdSVPE8LaPk8d1rsj9zw4Blysf+sPK8r6pz3GcBU0gIBECUr2NAyd707aRRJqKSXwZa K7O6br4ykUhJ5PX3zU72zbZ0GaEDLrzxUoOf3U5ihERQXRPKE0DiYs5jcM9hqla/xFMc z3k2zsbgs18Evq70hrAoCXh9ncj5El7fXiTel4Hbi12tVoK3H6TKyGYtG2F3sUXWep37 qRC0MPmYyGPBwLDss8ATQ6/Jl/5a0luUTxYmc1v5O2A9KXzek1Qmya6MYV737HpK7A5y kXEg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:from:subject:to:cc:mime-version:message-id :content-transfer-encoding; bh=AEaYw32qnHlvF+/j3/Jvpgo3bfQkRcMMSHiXyI3G7Uw=; b=N1wU4crEWUGEEBMZ/4Tv/+zhfX2Tv2zGCwRxljTXBxfuY7aALZ1HCwSM68nWWRvhJb iSD7Mov2zztkKAnMdLRYmf0+fquuaWRjOnDBrZp4uOvCBKCo4InH/HiCPRhun8yaV6PB N/W0eEdiNY25EWEYyTnuQlux2PbyP+F2H5nFx2BoznCS40vfqDg3l4RgEwO60V9sv7S0 mQm5JsYVYD11sKrHjlhE9V2G/iNkTv/W2LJ18y6UD5mzfzvEBQ/6qp/o1KymZ+0t+ngi FZ/icpor6xJrq6CHWNdgnpsIJDrSMj4KmqVrgy+10eyr360+i5QkLsDIcq4QM8lAjcy9 gsqA== X-Gm-Message-State: AGi0PuaB4aL55CKEYY0Gaun2Dsw2UkqAIqMM/Zx1gsGjYZCu0MzWPbCq KU5ysSmaiy1901ujJzDrKQM= X-Google-Smtp-Source: APiQypJWoBYoWAm7oki13Exmax+mrhiZhgvqqJoR2FMRTLGjgFCJvvugMY5vDPvbr1AOSRrFApd/Vw== X-Received: by 2002:a63:c007:: with SMTP id h7mr28169254pgg.428.1586987130406; Wed, 15 Apr 2020 14:45:30 -0700 (PDT) Date: Thu, 16 Apr 2020 07:45:09 +1000 From: Nicholas Piggin To: linuxppc-dev@lists.ozlabs.org Cc: libc-alpha@sourceware.org, libc-dev@lists.llvm.org, musl@lists.openwall.com, Segher Boessenkool MIME-Version: 1.0 Message-Id: <1586931450.ub4c8cq8dj.astroid@bobo.none> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable Subject: [musl] Powerpc Linux 'scv' system call ABI proposal take 2 I would like to enable Linux support for the powerpc 'scv' instruction, as a faster system call instruction. This requires two things to be defined: Firstly a way to advertise to=20 userspace that kernel supports scv, and a way to allocate and advertise support for individual scv vectors. Secondly, a calling convention ABI for this new instruction. Thanks to those who commented last time, since then I have removed my answered questions and unpopular alternatives but you can find them here https://lists.ozlabs.org/pipermail/linuxppc-dev/2020-January/203545.html Let me try one more with a wider cc list, and then we'll get something merged. Any questions or counter-opinions are welcome. System Call Vectored (scv) ABI =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D The scv instruction is introduced with POWER9 / ISA3, it comes with an rfscv counter-part. The benefit of these instructions is performance (trading slower SRR0/1 with faster LR/CTR registers, and entering the kernel with MSR[EE] and MSR[RI] left enabled, which can reduce MSR=20 updates. The scv instruction has 128 interrupt entry points (not enough=20 to cover the Linux system call space). The proposal is to assign scv numbers very conservatively and allocate=20 them as individual HWCAP features as we add support for more. The zero=20 vector ('scv 0') will be used for normal system calls, equivalent to 'sc'. Advertisement Linux has not enabled FSCR[SCV] yet, so the instruction will cause a SIGILL in current environments. Linux has defined a HWCAP2 bit=20 PPC_FEATURE2_SCV for SCV support, but does not set it. When scv instruction support and the scv 0 vector for system calls are=20 added, PPC_FEATURE2_SCV will indicate support for these. Other vectors=20 should not be used without future HWCAP bits indicating support, which is how we will allocate them. (Should unallocated ones generate SIGILL, or return -ENOSYS in r3?) Calling convention The proposal is for scv 0 to provide the standard Linux system call ABI=20 with the following differences from sc convention[1]: - LR is to be volatile across scv calls. This is necessary because the=20 scv instruction clobbers LR. From previous discussion, this should be=20 possible to deal with in GCC clobbers and CFI. - CR1 and CR5-CR7 are volatile. This matches the C ABI and would allow the kernel system call exit to avoid restoring the CR register (although=20 we probably still would anyway to avoid information leak). - Error handling: I think the consensus has been to move to using negative return value in r3 rather than CR0[SO]=3D1 to indicate error, which match= es most other architectures and is closer to a function call. The number of scratch registers (r9-r12) at kernel entry seems=20 sufficient that we don't have any costly spilling, patch is here[2]. =20 [1] https://github.com/torvalds/linux/blob/master/Documentation/powerpc/sys= call64-abi.rst [2] https://lists.ozlabs.org/pipermail/linuxppc-dev/2020-February/204840.ht= ml