From mboxrd@z Thu Jan 1 00:00:00 1970 X-Msuck: nntp://news.gmane.org/gmane.linux.lib.musl.general/1287 Path: news.gmane.org!not-for-mail From: Szabolcs Nagy Newsgroups: gmane.linux.lib.musl.general Subject: Re: mips port working! & remaining issues Date: Fri, 13 Jul 2012 18:10:12 +0200 Message-ID: <20120713161011.GB14463@port70.net> References: <20120713052313.GA20369@brightrain.aerifal.cx> <20120713081525.GA14463@port70.net> <20120713130830.GH544@brightrain.aerifal.cx> <50002443.6050003@gentoo.org> <20120713142521.GI544@brightrain.aerifal.cx> Reply-To: musl@lists.openwall.com NNTP-Posting-Host: plane.gmane.org Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii X-Trace: dough.gmane.org 1342195826 10772 80.91.229.3 (13 Jul 2012 16:10:26 GMT) X-Complaints-To: usenet@dough.gmane.org NNTP-Posting-Date: Fri, 13 Jul 2012 16:10:26 +0000 (UTC) To: musl@lists.openwall.com Original-X-From: musl-return-1288-gllmg-musl=m.gmane.org@lists.openwall.com Fri Jul 13 18:10:25 2012 Return-path: Envelope-to: gllmg-musl@plane.gmane.org Original-Received: from mother.openwall.net ([195.42.179.200]) by plane.gmane.org with smtp (Exim 4.69) (envelope-from ) id 1SpiRk-0003mi-RB for gllmg-musl@plane.gmane.org; Fri, 13 Jul 2012 18:10:24 +0200 Original-Received: (qmail 31845 invoked by uid 550); 13 Jul 2012 16:10:24 -0000 Mailing-List: contact musl-help@lists.openwall.com; run by ezmlm Precedence: bulk List-Post: List-Help: List-Unsubscribe: List-Subscribe: Original-Received: (qmail 31837 invoked from network); 13 Jul 2012 16:10:23 -0000 Content-Disposition: inline In-Reply-To: <20120713142521.GI544@brightrain.aerifal.cx> User-Agent: Mutt/1.5.21 (2010-09-15) Xref: news.gmane.org gmane.linux.lib.musl.general:1287 Archived-At: * Rich Felker [2012-07-13 10:25:21 -0400]: > On Fri, Jul 13, 2012 at 03:36:03PM +0200, Luca Barbato wrote: > > On 07/13/2012 03:08 PM, Rich Felker wrote: > > > > > My understanding is that the EABI provides conventions that ensure > > > that code can be linked together whether it's written to use hard or > > > soft float. But unless all floating point registers are temp (not > > > callee-saved), I can't find a way to make that work with setjmp... > > > > Currently hardfloat just pass the registers instead of doing some copy > > over in a way or another and it is what people will use. > > That's the hardfloat ABI variant of EABI, but there's also base EABI > that can use hard float behind the scenes (in the soft float > functions) just by calling the __aeabi functions and having them > implemented with hard-float. Although I suppose this usage does not > require the registers to be preserved. > > Now I just need to work out a nice way to conditionally compile > different ASM for each variant. Or I could have setjmp and longjmp > just read a global var with the hardfloat flag in it, and jump over > the float register code if it's false. Opinions on what's best? > > Rich glibc seems to do runtime check for vfp and iwmmxt fpu on arm http://sourceware.org/git/?p=glibc.git;a=blob;f=ports/sysdeps/arm/setjmp.S and do compile time check on mips http://sourceware.org/git/?p=glibc.git;a=blob;f=ports/sysdeps/mips/setjmp_aux.c