From: Rich Felker <dalias@aerifal.cx>
To: musl@lists.openwall.com
Subject: Re: Optimized C memcpy
Date: Thu, 8 Aug 2013 11:15:02 -0400 [thread overview]
Message-ID: <20130808151502.GP221@brightrain.aerifal.cx> (raw)
In-Reply-To: <1375967031.16501.7506555.32466BB3@webmail.messagingengine.com>
On Thu, Aug 08, 2013 at 09:03:51AM -0400, Andrew Bradford wrote:
> > > This is not a replacement for the ARM asm (which is still better), but
> > > it's a step towards avoiding the need to have written-by-hand assembly
> > > for every single new arch we add as a prerequisite for tolerable
> > > performance.
> >
> > Sorry if this has been discussed before but Google isn't much help. Why
> > is 32 bytes chosen as the block size over other sizes?
> >
> > It seems that the code would be fewer lines if blocks were 4 bytes,
>
> Sorry, I now see why 4 byte blocks won't work due to the misalignment,
> but 8 or 16 seem like they should be possible.
> Is it just the evaluation of the for loop being expensive that's trying
> to be avoided?
It's purely empirical reasons. 8 is the smallest that would work
without extra logic to shuffle w/x. 16 runs 50% slower than the ARM
asm. 32 runs only 25% slower than the ARM asm.
Rich
next prev parent reply other threads:[~2013-08-08 15:15 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-08-07 18:21 Rich Felker
2013-08-08 12:59 ` Andrew Bradford
2013-08-08 13:03 ` Andrew Bradford
2013-08-08 13:17 ` Luca Barbato
2013-08-08 15:15 ` Rich Felker [this message]
2013-08-08 20:17 ` Andre Renaud
2013-08-08 20:26 ` Rich Felker
2013-08-09 5:02 ` Rob Landley
2013-08-11 5:11 ` Optimized C memcpy [updated] Rich Felker
2013-08-11 6:20 ` Rich Felker
2013-08-11 8:13 ` Rich Felker
2013-08-11 11:14 ` Luca Barbato
2013-08-11 11:27 ` Rich Felker
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