From mboxrd@z Thu Jan 1 00:00:00 1970 X-Msuck: nntp://news.gmane.org/gmane.linux.lib.musl.general/4033 Path: news.gmane.org!not-for-mail From: Szabolcs Nagy Newsgroups: gmane.linux.lib.musl.general Subject: Re: Arm AArch64 port - search for interested people Date: Wed, 11 Sep 2013 19:53:30 +0200 Message-ID: <20130911175330.GF5116@port70.net> References: <20130911125851.GE5116@port70.net> <20130911165129.GA20515@brightrain.aerifal.cx> Reply-To: musl@lists.openwall.com NNTP-Posting-Host: plane.gmane.org Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii X-Trace: ger.gmane.org 1378922021 6946 80.91.229.3 (11 Sep 2013 17:53:41 GMT) X-Complaints-To: usenet@ger.gmane.org NNTP-Posting-Date: Wed, 11 Sep 2013 17:53:41 +0000 (UTC) To: musl@lists.openwall.com Original-X-From: musl-return-4037-gllmg-musl=m.gmane.org@lists.openwall.com Wed Sep 11 19:53:43 2013 Return-path: Envelope-to: gllmg-musl@plane.gmane.org Original-Received: from mother.openwall.net ([195.42.179.200]) by plane.gmane.org with smtp (Exim 4.69) (envelope-from ) id 1VJobn-0003hb-DI for gllmg-musl@plane.gmane.org; Wed, 11 Sep 2013 19:53:43 +0200 Original-Received: (qmail 29725 invoked by uid 550); 11 Sep 2013 17:53:42 -0000 Mailing-List: contact musl-help@lists.openwall.com; run by ezmlm Precedence: bulk List-Post: List-Help: List-Unsubscribe: List-Subscribe: Original-Received: (qmail 29712 invoked from network); 11 Sep 2013 17:53:42 -0000 Content-Disposition: inline In-Reply-To: <20130911165129.GA20515@brightrain.aerifal.cx> User-Agent: Mutt/1.5.21 (2010-09-15) Xref: news.gmane.org gmane.linux.lib.musl.general:4033 Archived-At: * Rich Felker [2013-09-11 12:51:29 -0400]: > > however complete support will take some time.. and it will > > depend on the soft-float implementation in gcc which has > > fenv issues > > I would hope on archs with hardfloat but where long double is > implemented with softfloat, gcc is smart enough to do something with > the fpu to raise the appropriate flags. Any idea if this is the case, > or if the AArch64 ABI mentions the issue at all? yes, i was wrong, gcc seems to use the fpu fenv in such cases (libgcc uses inline asm fp arithmetics to raise the exceptions.. they don't trust themselfs about incorrectly optimizing away fp operations in c code)