From mboxrd@z Thu Jan 1 00:00:00 1970 X-Msuck: nntp://news.gmane.org/gmane.linux.lib.musl.general/5538 Path: news.gmane.org!not-for-mail From: Stefan Kristiansson Newsgroups: gmane.linux.lib.musl.general Subject: Re: How to build a musl toolchain for or1k Date: Sun, 20 Jul 2014 09:18:33 +0300 Message-ID: <20140720061832.GA28475@chokladfabriken.org> References: <20140719222628.GA19901@chokladfabriken.org> <20140719230655.GG17402@brightrain.aerifal.cx> Reply-To: musl@lists.openwall.com NNTP-Posting-Host: plane.gmane.org Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii X-Trace: ger.gmane.org 1405837164 3852 80.91.229.3 (20 Jul 2014 06:19:24 GMT) X-Complaints-To: usenet@ger.gmane.org NNTP-Posting-Date: Sun, 20 Jul 2014 06:19:24 +0000 (UTC) Cc: musl@lists.openwall.com To: Rich Felker Original-X-From: musl-return-5543-gllmg-musl=m.gmane.org@lists.openwall.com Sun Jul 20 08:19:19 2014 Return-path: Envelope-to: gllmg-musl@plane.gmane.org Original-Received: from mother.openwall.net ([195.42.179.200]) by plane.gmane.org with smtp (Exim 4.69) (envelope-from ) id 1X8kSs-0002l7-8O for gllmg-musl@plane.gmane.org; Sun, 20 Jul 2014 08:19:18 +0200 Original-Received: (qmail 9955 invoked by uid 550); 20 Jul 2014 06:19:17 -0000 Mailing-List: contact musl-help@lists.openwall.com; run by ezmlm Precedence: bulk List-Post: List-Help: List-Unsubscribe: List-Subscribe: Original-Received: (qmail 9942 invoked from network); 20 Jul 2014 06:19:17 -0000 Content-Disposition: inline In-Reply-To: <20140719230655.GG17402@brightrain.aerifal.cx> User-Agent: Mutt/1.5.21 (2010-09-15) X-Spam-Status: No, score=0.0 required=12.0 tests=none autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on smtp.lau.hel.nebula.fi Xref: news.gmane.org gmane.linux.lib.musl.general:5538 Archived-At: On Sat, Jul 19, 2014 at 07:06:56PM -0400, Rich Felker wrote: > On Sun, Jul 20, 2014 at 01:26:29AM +0300, Stefan Kristiansson wrote: > > Mainline kernel is missing support for a couple of features required > > by musl (mostly related to the atomic instructions). I've added > > support for them, but sending out patches for them is yet to be done. > > In the meantime, they are all present in the smp branch of > > git://openrisc.net/stefan/linux. > > What kernel features are needed for atomics to work? I figured it was > mainly a cpu-level issue. Or were changes needed for the kernel to > properly clear the lwa/swa flag on context switch? > It is mainly a cpu-level issue, and there's actually only two patches in that branch that are required for musl to work. 1) There's no way on or1k to determine if a data page fault was a read or write fault other than reading the instruction at the faulting PC and check if it was a store instructions. The atomic store instruction (l.swa) was missing from this check. http://git.openrisc.net/cgit.cgi/stefan/linux/commit/?h=smp&id=a966c95bb10a43cab16e2be97518ad8be0695a95 2) In order to get kernel support for robust_list, there need to be arch specific implementations of the futex_atomic_* operations. These implementations were missing. http://git.openrisc.net/cgit.cgi/stefan/linux/commit/?h=smp&id=d863b0637811dd559363a3f1bf9d966e35b21bab > It would be really nice if the kernel could also trap and emulate > l.lwa/l.swa and perhaps also l.msync so that these features could be > used on old emulators/hardware that lack them. > I agree. > > git clone -b smp git://openrisc.net/stefan/linux > > make ARCH=openrisc musl_defconfig > > make ARCH=openrisc > > What's special in musl_defconfig? :) > Actually very little ;) The support for the atomic instructions is enabled. Stefan