Re: [PATCH] replace a mfence instruction by an xchg instruction

[Rich Felker <dalias@libc.org>]

On Sun, Aug 16, 2015 at 06:38:32PM +0200, Jens Gustedt wrote:
> Am Sonntag, den 16.08.2015, 12:28 -0400 schrieb Rich Felker:
> > On Sat, Aug 15, 2015 at 08:51:41AM +0200, Jens Gustedt wrote:
> > > according to the wisdom of the Internet, e.g
> > > 
> > > https://peeterjoot.wordpress.com/2009/12/04/intel-memory-ordering-fence-instructions-and-atomic-operations/
> > > 
> > > a mfence instruction is about 3 times slower than an xchg instruction.
> > 
> > I can't find where the article makes this claim. Could you point out
> > what part you're referring to?
> 
> I read this in the section that says "Performance comparsion".
> 
> There it says something like "lock xchg" 16x baseline and "smfence"
> 47-67 x baseline. But perhaps I am misinterpreting things.

This is comparing an idiotic (and invalid, but maybe barely-working on
x86) Dekker lock using mfence with a simple xchg-based lock. It's not
comparing mfence to lock-xchg as barriers.

Rich