* [PATCH v2] Add PowerPC soft-float support
@ 2015-07-10 11:02 Felix Fietkau
2015-08-06 22:47 ` Szabolcs Nagy
0 siblings, 1 reply; 5+ messages in thread
From: Felix Fietkau @ 2015-07-10 11:02 UTC (permalink / raw)
To: musl
Some PowerPC CPUs (e.g. Freescale MPC85xx) have a completely different
instruction set for floating point operations (SPE).
Executing regular PowerPC floating point instructions results in
"Illegal instruction" errors.
Make it possible to run these devices in soft-float mode.
Signed-off-by: Felix Fietkau <nbd@openwrt.org>
---
arch/powerpc/reloc.h | 8 ++++++-
configure | 4 ++++
src/fenv/powerpc-sf/fenv.sub | 1 +
src/setjmp/powerpc-sf/longjmp.s | 47 +++++++++++++++++++++++++++++++++++++++
src/setjmp/powerpc-sf/longjmp.sub | 1 +
src/setjmp/powerpc-sf/setjmp.s | 43 +++++++++++++++++++++++++++++++++++
src/setjmp/powerpc-sf/setjmp.sub | 1 +
7 files changed, 104 insertions(+), 1 deletion(-)
create mode 100644 src/fenv/powerpc-sf/fenv.sub
create mode 100644 src/setjmp/powerpc-sf/longjmp.s
create mode 100644 src/setjmp/powerpc-sf/longjmp.sub
create mode 100644 src/setjmp/powerpc-sf/setjmp.s
create mode 100644 src/setjmp/powerpc-sf/setjmp.sub
diff --git a/arch/powerpc/reloc.h b/arch/powerpc/reloc.h
index aa5f8c9..7880fb5 100644
--- a/arch/powerpc/reloc.h
+++ b/arch/powerpc/reloc.h
@@ -1,4 +1,10 @@
-#define LDSO_ARCH "powerpc"
+#ifdef _SOFT_FLOAT
+#define FP_SUFFIX "-sf"
+#else
+#define FP_SUFFIX ""
+#endif
+
+#define LDSO_ARCH "powerpc" FP_SUFFIX
#define TPOFF_K (-0x7000)
diff --git a/configure b/configure
index beed406..1e94f06 100755
--- a/configure
+++ b/configure
@@ -522,6 +522,10 @@ trycppif "_MIPSEL || __MIPSEL || __MIPSEL__" "$t" && SUBARCH=${SUBARCH}el
trycppif __mips_soft_float "$t" && SUBARCH=${SUBARCH}-sf
fi
+if test "$ARCH" = "powerpc" ; then
+trycppif _SOFT_FLOAT "$t" && SUBARCH=${SUBARCH}-sf
+fi
+
test "$ARCH" = "microblaze" && trycppif __MICROBLAZEEL__ "$t" \
&& SUBARCH=${SUBARCH}el
diff --git a/src/fenv/powerpc-sf/fenv.sub b/src/fenv/powerpc-sf/fenv.sub
new file mode 100644
index 0000000..9cafca5
--- /dev/null
+++ b/src/fenv/powerpc-sf/fenv.sub
@@ -0,0 +1 @@
+../fenv.c
diff --git a/src/setjmp/powerpc-sf/longjmp.s b/src/setjmp/powerpc-sf/longjmp.s
new file mode 100644
index 0000000..fd61ae7
--- /dev/null
+++ b/src/setjmp/powerpc-sf/longjmp.s
@@ -0,0 +1,47 @@
+ .global _longjmp
+ .global longjmp
+ .type _longjmp,@function
+ .type longjmp,@function
+_longjmp:
+longjmp:
+# void longjmp(jmp_buf env, int val);
+# put val into return register and restore the env saved in setjmp
+# if val(r4) is 0, put 1 there.
+ # 0) move old return address into r0
+ lwz 0, 0(3)
+ # 1) put it into link reg
+ mtlr 0
+ #2 ) restore stack ptr
+ lwz 1, 4(3)
+ #3) restore control reg
+ lwz 0, 8(3)
+ mtcr 0
+ #4) restore r14-r31
+ lwz 14, 12(3)
+ lwz 15, 16(3)
+ lwz 16, 20(3)
+ lwz 17, 24(3)
+ lwz 18, 28(3)
+ lwz 19, 32(3)
+ lwz 20, 36(3)
+ lwz 21, 40(3)
+ lwz 22, 44(3)
+ lwz 23, 48(3)
+ lwz 24, 52(3)
+ lwz 25, 56(3)
+ lwz 26, 60(3)
+ lwz 27, 64(3)
+ lwz 28, 68(3)
+ lwz 29, 72(3)
+ lwz 30, 76(3)
+ lwz 31, 80(3)
+ #5) put val into return reg r3
+ mr 3, 4
+
+ #6) check if return value is 0, make it 1 in that case
+ cmpwi cr7, 4, 0
+ bne cr7, 1f
+ li 3, 1
+1:
+ blr
+
diff --git a/src/setjmp/powerpc-sf/longjmp.sub b/src/setjmp/powerpc-sf/longjmp.sub
new file mode 100644
index 0000000..e80331b
--- /dev/null
+++ b/src/setjmp/powerpc-sf/longjmp.sub
@@ -0,0 +1 @@
+longjmp.s
diff --git a/src/setjmp/powerpc-sf/setjmp.s b/src/setjmp/powerpc-sf/setjmp.s
new file mode 100644
index 0000000..17c2663
--- /dev/null
+++ b/src/setjmp/powerpc-sf/setjmp.s
@@ -0,0 +1,43 @@
+ .global ___setjmp
+ .hidden ___setjmp
+ .global __setjmp
+ .global _setjmp
+ .global setjmp
+ .type __setjmp,@function
+ .type _setjmp,@function
+ .type setjmp,@function
+___setjmp:
+__setjmp:
+_setjmp:
+setjmp:
+ # 0) store IP int 0, then into the jmpbuf pointed to by r3 (first arg)
+ mflr 0
+ stw 0, 0(3)
+ # 1) store reg1 (SP)
+ stw 1, 4(3)
+ # 2) store cr
+ mfcr 0
+ stw 0, 8(3)
+ # 3) store r14-31
+ stw 14, 12(3)
+ stw 15, 16(3)
+ stw 16, 20(3)
+ stw 17, 24(3)
+ stw 18, 28(3)
+ stw 19, 32(3)
+ stw 20, 36(3)
+ stw 21, 40(3)
+ stw 22, 44(3)
+ stw 23, 48(3)
+ stw 24, 52(3)
+ stw 25, 56(3)
+ stw 26, 60(3)
+ stw 27, 64(3)
+ stw 28, 68(3)
+ stw 29, 72(3)
+ stw 30, 76(3)
+ stw 31, 80(3)
+ # 4) set return value to 0
+ li 3, 0
+ # 5) return
+ blr
diff --git a/src/setjmp/powerpc-sf/setjmp.sub b/src/setjmp/powerpc-sf/setjmp.sub
new file mode 100644
index 0000000..b7ad221
--- /dev/null
+++ b/src/setjmp/powerpc-sf/setjmp.sub
@@ -0,0 +1 @@
+setjmp.s
--
2.2.2
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH v2] Add PowerPC soft-float support
2015-07-10 11:02 [PATCH v2] Add PowerPC soft-float support Felix Fietkau
@ 2015-08-06 22:47 ` Szabolcs Nagy
2015-08-07 1:55 ` Khem Raj
2015-08-30 23:05 ` Rich Felker
0 siblings, 2 replies; 5+ messages in thread
From: Szabolcs Nagy @ 2015-08-06 22:47 UTC (permalink / raw)
To: musl
* Felix Fietkau <nbd@openwrt.org> [2015-07-10 13:02:51 +0200]:
> Some PowerPC CPUs (e.g. Freescale MPC85xx) have a completely different
> instruction set for floating point operations (SPE).
> Executing regular PowerPC floating point instructions results in
> "Illegal instruction" errors.
>
> Make it possible to run these devices in soft-float mode.
>
thanks, this looks good
i used
#define MUSL_DYNAMIC_LINKER \
"/lib/ld-musl-powerpc" MUSL_DYNAMIC_LINKER_E "%{msoft-float:-sf}.so.1"
in gcc to get a soft float toolchain.
(MUSL_DYNAMIC_LINKER_E is "le" on little endian).
but i'm not yet sure if -msoft-float is always passed
down by gcc for soft float targets.
(the gcc config files are rather messy, there might be more
ppc abi variants lurking there)
> Signed-off-by: Felix Fietkau <nbd@openwrt.org>
> ---
> arch/powerpc/reloc.h | 8 ++++++-
> configure | 4 ++++
> src/fenv/powerpc-sf/fenv.sub | 1 +
this is not enough for fenv.
unsupported FE_* macros must be hidden in arch/powerpc/bits/fenv.h
(see e.g. how arm does it), exceptions and non-nearest rounding
are not supported for soft float.
the rest looks ok to me.
> src/setjmp/powerpc-sf/longjmp.s | 47 +++++++++++++++++++++++++++++++++++++++
> src/setjmp/powerpc-sf/longjmp.sub | 1 +
> src/setjmp/powerpc-sf/setjmp.s | 43 +++++++++++++++++++++++++++++++++++
> src/setjmp/powerpc-sf/setjmp.sub | 1 +
> 7 files changed, 104 insertions(+), 1 deletion(-)
> create mode 100644 src/fenv/powerpc-sf/fenv.sub
> create mode 100644 src/setjmp/powerpc-sf/longjmp.s
> create mode 100644 src/setjmp/powerpc-sf/longjmp.sub
> create mode 100644 src/setjmp/powerpc-sf/setjmp.s
> create mode 100644 src/setjmp/powerpc-sf/setjmp.sub
>
> diff --git a/arch/powerpc/reloc.h b/arch/powerpc/reloc.h
> index aa5f8c9..7880fb5 100644
> --- a/arch/powerpc/reloc.h
> +++ b/arch/powerpc/reloc.h
> @@ -1,4 +1,10 @@
> -#define LDSO_ARCH "powerpc"
> +#ifdef _SOFT_FLOAT
> +#define FP_SUFFIX "-sf"
> +#else
> +#define FP_SUFFIX ""
> +#endif
> +
> +#define LDSO_ARCH "powerpc" FP_SUFFIX
>
> #define TPOFF_K (-0x7000)
>
> diff --git a/configure b/configure
> index beed406..1e94f06 100755
> --- a/configure
> +++ b/configure
> @@ -522,6 +522,10 @@ trycppif "_MIPSEL || __MIPSEL || __MIPSEL__" "$t" && SUBARCH=${SUBARCH}el
> trycppif __mips_soft_float "$t" && SUBARCH=${SUBARCH}-sf
> fi
>
> +if test "$ARCH" = "powerpc" ; then
> +trycppif _SOFT_FLOAT "$t" && SUBARCH=${SUBARCH}-sf
> +fi
> +
> test "$ARCH" = "microblaze" && trycppif __MICROBLAZEEL__ "$t" \
> && SUBARCH=${SUBARCH}el
>
> diff --git a/src/fenv/powerpc-sf/fenv.sub b/src/fenv/powerpc-sf/fenv.sub
> new file mode 100644
> index 0000000..9cafca5
> --- /dev/null
> +++ b/src/fenv/powerpc-sf/fenv.sub
> @@ -0,0 +1 @@
> +../fenv.c
> diff --git a/src/setjmp/powerpc-sf/longjmp.s b/src/setjmp/powerpc-sf/longjmp.s
> new file mode 100644
> index 0000000..fd61ae7
> --- /dev/null
> +++ b/src/setjmp/powerpc-sf/longjmp.s
> @@ -0,0 +1,47 @@
> + .global _longjmp
> + .global longjmp
> + .type _longjmp,@function
> + .type longjmp,@function
> +_longjmp:
> +longjmp:
> +# void longjmp(jmp_buf env, int val);
> +# put val into return register and restore the env saved in setjmp
> +# if val(r4) is 0, put 1 there.
> + # 0) move old return address into r0
> + lwz 0, 0(3)
> + # 1) put it into link reg
> + mtlr 0
> + #2 ) restore stack ptr
> + lwz 1, 4(3)
> + #3) restore control reg
> + lwz 0, 8(3)
> + mtcr 0
> + #4) restore r14-r31
> + lwz 14, 12(3)
> + lwz 15, 16(3)
> + lwz 16, 20(3)
> + lwz 17, 24(3)
> + lwz 18, 28(3)
> + lwz 19, 32(3)
> + lwz 20, 36(3)
> + lwz 21, 40(3)
> + lwz 22, 44(3)
> + lwz 23, 48(3)
> + lwz 24, 52(3)
> + lwz 25, 56(3)
> + lwz 26, 60(3)
> + lwz 27, 64(3)
> + lwz 28, 68(3)
> + lwz 29, 72(3)
> + lwz 30, 76(3)
> + lwz 31, 80(3)
> + #5) put val into return reg r3
> + mr 3, 4
> +
> + #6) check if return value is 0, make it 1 in that case
> + cmpwi cr7, 4, 0
> + bne cr7, 1f
> + li 3, 1
> +1:
> + blr
> +
> diff --git a/src/setjmp/powerpc-sf/longjmp.sub b/src/setjmp/powerpc-sf/longjmp.sub
> new file mode 100644
> index 0000000..e80331b
> --- /dev/null
> +++ b/src/setjmp/powerpc-sf/longjmp.sub
> @@ -0,0 +1 @@
> +longjmp.s
> diff --git a/src/setjmp/powerpc-sf/setjmp.s b/src/setjmp/powerpc-sf/setjmp.s
> new file mode 100644
> index 0000000..17c2663
> --- /dev/null
> +++ b/src/setjmp/powerpc-sf/setjmp.s
> @@ -0,0 +1,43 @@
> + .global ___setjmp
> + .hidden ___setjmp
> + .global __setjmp
> + .global _setjmp
> + .global setjmp
> + .type __setjmp,@function
> + .type _setjmp,@function
> + .type setjmp,@function
> +___setjmp:
> +__setjmp:
> +_setjmp:
> +setjmp:
> + # 0) store IP int 0, then into the jmpbuf pointed to by r3 (first arg)
> + mflr 0
> + stw 0, 0(3)
> + # 1) store reg1 (SP)
> + stw 1, 4(3)
> + # 2) store cr
> + mfcr 0
> + stw 0, 8(3)
> + # 3) store r14-31
> + stw 14, 12(3)
> + stw 15, 16(3)
> + stw 16, 20(3)
> + stw 17, 24(3)
> + stw 18, 28(3)
> + stw 19, 32(3)
> + stw 20, 36(3)
> + stw 21, 40(3)
> + stw 22, 44(3)
> + stw 23, 48(3)
> + stw 24, 52(3)
> + stw 25, 56(3)
> + stw 26, 60(3)
> + stw 27, 64(3)
> + stw 28, 68(3)
> + stw 29, 72(3)
> + stw 30, 76(3)
> + stw 31, 80(3)
> + # 4) set return value to 0
> + li 3, 0
> + # 5) return
> + blr
> diff --git a/src/setjmp/powerpc-sf/setjmp.sub b/src/setjmp/powerpc-sf/setjmp.sub
> new file mode 100644
> index 0000000..b7ad221
> --- /dev/null
> +++ b/src/setjmp/powerpc-sf/setjmp.sub
> @@ -0,0 +1 @@
> +setjmp.s
> --
> 2.2.2
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH v2] Add PowerPC soft-float support
2015-08-06 22:47 ` Szabolcs Nagy
@ 2015-08-07 1:55 ` Khem Raj
2015-08-07 11:32 ` Szabolcs Nagy
2015-08-30 23:05 ` Rich Felker
1 sibling, 1 reply; 5+ messages in thread
From: Khem Raj @ 2015-08-07 1:55 UTC (permalink / raw)
To: musl
On Thu, Aug 6, 2015 at 3:47 PM, Szabolcs Nagy <nsz@port70.net> wrote:
> * Felix Fietkau <nbd@openwrt.org> [2015-07-10 13:02:51 +0200]:
>> Some PowerPC CPUs (e.g. Freescale MPC85xx) have a completely different
>> instruction set for floating point operations (SPE).
>> Executing regular PowerPC floating point instructions results in
>> "Illegal instruction" errors.
>>
>> Make it possible to run these devices in soft-float mode.
>>
>
> thanks, this looks good
>
> i used
>
> #define MUSL_DYNAMIC_LINKER \
> "/lib/ld-musl-powerpc" MUSL_DYNAMIC_LINKER_E "%{msoft-float:-sf}.so.1"
>
> in gcc to get a soft float toolchain.
> (MUSL_DYNAMIC_LINKER_E is "le" on little endian).
> but i'm not yet sure if -msoft-float is always passed
> down by gcc for soft float targets.
use --with-float=soft --disable-altivec to configure gcc or may be
target triplet powerpc-linux-musl-gnuspe would work too.
>
> (the gcc config files are rather messy, there might be more
> ppc abi variants lurking there)
>
>> Signed-off-by: Felix Fietkau <nbd@openwrt.org>
>> ---
>> arch/powerpc/reloc.h | 8 ++++++-
>> configure | 4 ++++
>> src/fenv/powerpc-sf/fenv.sub | 1 +
>
> this is not enough for fenv.
>
> unsupported FE_* macros must be hidden in arch/powerpc/bits/fenv.h
> (see e.g. how arm does it), exceptions and non-nearest rounding
> are not supported for soft float.
>
> the rest looks ok to me.
>
>> src/setjmp/powerpc-sf/longjmp.s | 47 +++++++++++++++++++++++++++++++++++++++
>> src/setjmp/powerpc-sf/longjmp.sub | 1 +
>> src/setjmp/powerpc-sf/setjmp.s | 43 +++++++++++++++++++++++++++++++++++
>> src/setjmp/powerpc-sf/setjmp.sub | 1 +
>> 7 files changed, 104 insertions(+), 1 deletion(-)
>> create mode 100644 src/fenv/powerpc-sf/fenv.sub
>> create mode 100644 src/setjmp/powerpc-sf/longjmp.s
>> create mode 100644 src/setjmp/powerpc-sf/longjmp.sub
>> create mode 100644 src/setjmp/powerpc-sf/setjmp.s
>> create mode 100644 src/setjmp/powerpc-sf/setjmp.sub
>>
>> diff --git a/arch/powerpc/reloc.h b/arch/powerpc/reloc.h
>> index aa5f8c9..7880fb5 100644
>> --- a/arch/powerpc/reloc.h
>> +++ b/arch/powerpc/reloc.h
>> @@ -1,4 +1,10 @@
>> -#define LDSO_ARCH "powerpc"
>> +#ifdef _SOFT_FLOAT
>> +#define FP_SUFFIX "-sf"
>> +#else
>> +#define FP_SUFFIX ""
>> +#endif
>> +
>> +#define LDSO_ARCH "powerpc" FP_SUFFIX
>>
>> #define TPOFF_K (-0x7000)
>>
>> diff --git a/configure b/configure
>> index beed406..1e94f06 100755
>> --- a/configure
>> +++ b/configure
>> @@ -522,6 +522,10 @@ trycppif "_MIPSEL || __MIPSEL || __MIPSEL__" "$t" && SUBARCH=${SUBARCH}el
>> trycppif __mips_soft_float "$t" && SUBARCH=${SUBARCH}-sf
>> fi
>>
>> +if test "$ARCH" = "powerpc" ; then
>> +trycppif _SOFT_FLOAT "$t" && SUBARCH=${SUBARCH}-sf
>> +fi
>> +
>> test "$ARCH" = "microblaze" && trycppif __MICROBLAZEEL__ "$t" \
>> && SUBARCH=${SUBARCH}el
>>
>> diff --git a/src/fenv/powerpc-sf/fenv.sub b/src/fenv/powerpc-sf/fenv.sub
>> new file mode 100644
>> index 0000000..9cafca5
>> --- /dev/null
>> +++ b/src/fenv/powerpc-sf/fenv.sub
>> @@ -0,0 +1 @@
>> +../fenv.c
>> diff --git a/src/setjmp/powerpc-sf/longjmp.s b/src/setjmp/powerpc-sf/longjmp.s
>> new file mode 100644
>> index 0000000..fd61ae7
>> --- /dev/null
>> +++ b/src/setjmp/powerpc-sf/longjmp.s
>> @@ -0,0 +1,47 @@
>> + .global _longjmp
>> + .global longjmp
>> + .type _longjmp,@function
>> + .type longjmp,@function
>> +_longjmp:
>> +longjmp:
>> +# void longjmp(jmp_buf env, int val);
>> +# put val into return register and restore the env saved in setjmp
>> +# if val(r4) is 0, put 1 there.
>> + # 0) move old return address into r0
>> + lwz 0, 0(3)
>> + # 1) put it into link reg
>> + mtlr 0
>> + #2 ) restore stack ptr
>> + lwz 1, 4(3)
>> + #3) restore control reg
>> + lwz 0, 8(3)
>> + mtcr 0
>> + #4) restore r14-r31
>> + lwz 14, 12(3)
>> + lwz 15, 16(3)
>> + lwz 16, 20(3)
>> + lwz 17, 24(3)
>> + lwz 18, 28(3)
>> + lwz 19, 32(3)
>> + lwz 20, 36(3)
>> + lwz 21, 40(3)
>> + lwz 22, 44(3)
>> + lwz 23, 48(3)
>> + lwz 24, 52(3)
>> + lwz 25, 56(3)
>> + lwz 26, 60(3)
>> + lwz 27, 64(3)
>> + lwz 28, 68(3)
>> + lwz 29, 72(3)
>> + lwz 30, 76(3)
>> + lwz 31, 80(3)
>> + #5) put val into return reg r3
>> + mr 3, 4
>> +
>> + #6) check if return value is 0, make it 1 in that case
>> + cmpwi cr7, 4, 0
>> + bne cr7, 1f
>> + li 3, 1
>> +1:
>> + blr
>> +
>> diff --git a/src/setjmp/powerpc-sf/longjmp.sub b/src/setjmp/powerpc-sf/longjmp.sub
>> new file mode 100644
>> index 0000000..e80331b
>> --- /dev/null
>> +++ b/src/setjmp/powerpc-sf/longjmp.sub
>> @@ -0,0 +1 @@
>> +longjmp.s
>> diff --git a/src/setjmp/powerpc-sf/setjmp.s b/src/setjmp/powerpc-sf/setjmp.s
>> new file mode 100644
>> index 0000000..17c2663
>> --- /dev/null
>> +++ b/src/setjmp/powerpc-sf/setjmp.s
>> @@ -0,0 +1,43 @@
>> + .global ___setjmp
>> + .hidden ___setjmp
>> + .global __setjmp
>> + .global _setjmp
>> + .global setjmp
>> + .type __setjmp,@function
>> + .type _setjmp,@function
>> + .type setjmp,@function
>> +___setjmp:
>> +__setjmp:
>> +_setjmp:
>> +setjmp:
>> + # 0) store IP int 0, then into the jmpbuf pointed to by r3 (first arg)
>> + mflr 0
>> + stw 0, 0(3)
>> + # 1) store reg1 (SP)
>> + stw 1, 4(3)
>> + # 2) store cr
>> + mfcr 0
>> + stw 0, 8(3)
>> + # 3) store r14-31
>> + stw 14, 12(3)
>> + stw 15, 16(3)
>> + stw 16, 20(3)
>> + stw 17, 24(3)
>> + stw 18, 28(3)
>> + stw 19, 32(3)
>> + stw 20, 36(3)
>> + stw 21, 40(3)
>> + stw 22, 44(3)
>> + stw 23, 48(3)
>> + stw 24, 52(3)
>> + stw 25, 56(3)
>> + stw 26, 60(3)
>> + stw 27, 64(3)
>> + stw 28, 68(3)
>> + stw 29, 72(3)
>> + stw 30, 76(3)
>> + stw 31, 80(3)
>> + # 4) set return value to 0
>> + li 3, 0
>> + # 5) return
>> + blr
>> diff --git a/src/setjmp/powerpc-sf/setjmp.sub b/src/setjmp/powerpc-sf/setjmp.sub
>> new file mode 100644
>> index 0000000..b7ad221
>> --- /dev/null
>> +++ b/src/setjmp/powerpc-sf/setjmp.sub
>> @@ -0,0 +1 @@
>> +setjmp.s
>> --
>> 2.2.2
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH v2] Add PowerPC soft-float support
2015-08-07 1:55 ` Khem Raj
@ 2015-08-07 11:32 ` Szabolcs Nagy
0 siblings, 0 replies; 5+ messages in thread
From: Szabolcs Nagy @ 2015-08-07 11:32 UTC (permalink / raw)
To: musl
* Khem Raj <raj.khem@gmail.com> [2015-08-06 18:55:06 -0700]:
> On Thu, Aug 6, 2015 at 3:47 PM, Szabolcs Nagy <nsz@port70.net> wrote:
> > i used
> >
> > #define MUSL_DYNAMIC_LINKER \
> > "/lib/ld-musl-powerpc" MUSL_DYNAMIC_LINKER_E "%{msoft-float:-sf}.so.1"
> >
> > in gcc to get a soft float toolchain.
> > (MUSL_DYNAMIC_LINKER_E is "le" on little endian).
> > but i'm not yet sure if -msoft-float is always passed
> > down by gcc for soft float targets.
>
> use --with-float=soft --disable-altivec to configure gcc or may be
> target triplet powerpc-linux-musl-gnuspe would work too.
>
i was wondering how to patch gcc to emit the dynamic
linker name correctly.
i used --with-float=soft and then the resulting gcc
passes -msoft-float in the COLLECT_GCC_OPTIONS so then
the above linkspec works (sets -sf correctly).
but i think gcc can be configured for soft float cpu
in a way that it won't pass -msoft-float by default.
it certainly does not pass -msoft-float if i use explicit
-mcpu=e300c2 or similar: in that case the cpp, cc1 and as
seem to know it's soft float based on the cpu.
(sh target has the same issue).
this means the linkspec has to check the selected cpu,
not just the -msoft-float flag.
(i don't think it can be done in a future-proof way,
the current set of cpus are
401 403 405 405fp 440 440fp 464 464fp 476 476fp 505 601
602 603 603e 604 604e 620 630 740 7400 7450 750 801 821
823 8540 8548 860 970 G3 G4 G5 a2 cell e300c2 e300c3 e500mc
e500mc64 e5500 e6500 ec603e native power3 power4 power5
power5+ power6 power6x power7 power8 powerpc powerpc64
powerpc64le rs64 titan
and the linkspec should match the subset that don't have
fp regs)
and i'm not sure if spe abi is the same as the soft float abi.
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH v2] Add PowerPC soft-float support
2015-08-06 22:47 ` Szabolcs Nagy
2015-08-07 1:55 ` Khem Raj
@ 2015-08-30 23:05 ` Rich Felker
1 sibling, 0 replies; 5+ messages in thread
From: Rich Felker @ 2015-08-30 23:05 UTC (permalink / raw)
To: musl
On Fri, Aug 07, 2015 at 12:47:50AM +0200, Szabolcs Nagy wrote:
> * Felix Fietkau <nbd@openwrt.org> [2015-07-10 13:02:51 +0200]:
> > Some PowerPC CPUs (e.g. Freescale MPC85xx) have a completely different
> > instruction set for floating point operations (SPE).
> > Executing regular PowerPC floating point instructions results in
> > "Illegal instruction" errors.
> >
> > Make it possible to run these devices in soft-float mode.
I'd like to follow up on this now that the 1.1.11 release is out.
Let's try to go ahead and get it in on the musl side while we try to
get the gcc patches tweaked and upstream...
> thanks, this looks good
>
> i used
>
> #define MUSL_DYNAMIC_LINKER \
> "/lib/ld-musl-powerpc" MUSL_DYNAMIC_LINKER_E "%{msoft-float:-sf}.so.1"
>
> in gcc to get a soft float toolchain.
> (MUSL_DYNAMIC_LINKER_E is "le" on little endian).
> but i'm not yet sure if -msoft-float is always passed
> down by gcc for soft float targets.
>
> (the gcc config files are rather messy, there might be more
> ppc abi variants lurking there)
>
> > Signed-off-by: Felix Fietkau <nbd@openwrt.org>
> > ---
> > arch/powerpc/reloc.h | 8 ++++++-
> > configure | 4 ++++
> > src/fenv/powerpc-sf/fenv.sub | 1 +
>
> this is not enough for fenv.
>
> unsupported FE_* macros must be hidden in arch/powerpc/bits/fenv.h
> (see e.g. how arm does it), exceptions and non-nearest rounding
> are not supported for soft float.
>
> the rest looks ok to me.
Felix, do you have patches for fenv.h?
Rich
^ permalink raw reply [flat|nested] 5+ messages in thread
end of thread, other threads:[~2015-08-30 23:05 UTC | newest]
Thread overview: 5+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2015-07-10 11:02 [PATCH v2] Add PowerPC soft-float support Felix Fietkau
2015-08-06 22:47 ` Szabolcs Nagy
2015-08-07 1:55 ` Khem Raj
2015-08-07 11:32 ` Szabolcs Nagy
2015-08-30 23:05 ` Rich Felker
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