[PATCH] convert arm memcpy asm to UAL, remove .word hacks

[PATCH] convert arm memcpy asm to UAL, remove .word hacks

[Rich Felker]

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I've found that, contrary to the message in commit
9367fe926196f407705bb07cd29c6e40eb1774dd, all relevant gas versions
actually do support .syntax unified, and assemble memcpy.s
successfully with the attached patch applied. If there are no
objections I'd like to go ahead and commit it. The only remaining
.word hacks I'm aware of are in setjmp and longjmp, but they may still
be needed to avoid wrongly flagging plain EABI (softfloat) binaries
as needing hardfloat. I'd really like some feedback on what the issues
with that are and how to best avoid problems. Hopefully we can make
the transition to UAL syntax quickly in the next release cycle and get
Cortex-M support (with the new ARM FDPIC ABI).

Rich

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diff --git a/src/string/armel/memcpy.s b/src/string/armel/memcpy.s
index 9c5e38d..5416403 100644
--- a/src/string/armel/memcpy.s
+++ b/src/string/armel/memcpy.s
@@ -42,6 +42,8 @@
  * of prefetch code that is not compatible with older cpus.
  */
 
+.syntax unified
+
 .global memcpy
 .type memcpy,%function
 memcpy:
@@ -73,12 +75,12 @@ memcpy:
 	 */
 	movs    r12, r3, lsl #31
 	sub     r2, r2, r3              /* we know that r3 <= r2 because r2 >= 4 */
-	.word 0x44d13001 /* ldrbmi r3, [r1], #1 */
-	.word 0x24d14001 /* ldrbcs r4, [r1], #1 */
-	.word 0x24d1c001 /* ldrbcs r12,[r1], #1 */
-	.word 0x44c03001 /* strbmi r3, [r0], #1 */
-	.word 0x24c04001 /* strbcs r4, [r0], #1 */
-	.word 0x24c0c001 /* strbcs r12,[r0], #1 */
+	ldrbmi r3, [r1], #1
+	ldrbcs r4, [r1], #1
+	ldrbcs r12,[r1], #1
+	strbmi r3, [r0], #1
+	strbcs r4, [r0], #1
+	strbcs r12,[r0], #1
 
 src_aligned:
 
@@ -177,12 +179,12 @@ less_than_32_left:
 	stmmi   r0!, {r8, r9}
 	movs    r12, r2, lsl #30
 	ldrcs   r3, [r1], #4                    /*  4 bytes */
-	.word 0x40d140b2 /* ldrhmi r4, [r1], #2 */ /*  2 bytes */
+	ldrhmi r4, [r1], #2                     /*  2 bytes */
 	strcs   r3, [r0], #4
-	.word 0x40c040b2 /* strhmi r4, [r0], #2 */
+	strhmi r4, [r0], #2
 	tst     r2, #0x1
-	.word 0x15d13000 /* ldrbne r3, [r1] */  /*  last byte  */
-	.word 0x15c03000 /* strbne r3, [r0] */
+	ldrbne r3, [r1]                         /*  last byte  */
+	strbne r3, [r0]
 
 	/* we're done! restore everything and return */
 1:      ldmfd   sp!, {r5-r11}
@@ -224,11 +226,11 @@ non_congruent:
 	 * becomes aligned to 32 bits (r5 = nb of words to copy for alignment)
 	 */
 	movs    r5, r5, lsl #31
-	.word 0x44c03001 /* strbmi r3, [r0], #1 */
+	strbmi r3, [r0], #1
 	movmi   r3, r3, lsr #8
-	.word 0x24c03001 /* strbcs r3, [r0], #1 */
+	strbcs r3, [r0], #1
 	movcs   r3, r3, lsr #8
-	.word 0x24c03001 /* strbcs r3, [r0], #1 */
+	strbcs r3, [r0], #1
 	movcs   r3, r3, lsr #8
 
 	cmp     r2, #4
@@ -355,23 +357,23 @@ less_than_thirtytwo:
 partial_word_tail:
 	/* we have a partial word in the input buffer */
 	movs    r5, lr, lsl #(31-3)
-	.word 0x44c03001 /* strbmi r3, [r0], #1 */
+	strbmi r3, [r0], #1
 	movmi   r3, r3, lsr #8
-	.word 0x24c03001 /* strbcs r3, [r0], #1 */
+	strbcs r3, [r0], #1
 	movcs   r3, r3, lsr #8
-	.word 0x24c03001 /* strbcs r3, [r0], #1 */
+	strbcs r3, [r0], #1
 
 	/* Refill spilled registers from the stack. Don't update sp. */
 	ldmfd   sp, {r5-r11}
 
 copy_last_3_and_return:
 	movs    r2, r2, lsl #31 /* copy remaining 0, 1, 2 or 3 bytes */
-	.word 0x44d12001 /* ldrbmi r2, [r1], #1 */
-	.word 0x24d13001 /* ldrbcs r3, [r1], #1 */
-	.word 0x25d1c000 /* ldrbcs r12,[r1] */
-	.word 0x44c02001 /* strbmi r2, [r0], #1 */
-	.word 0x24c03001 /* strbcs r3, [r0], #1 */
-	.word 0x25c0c000 /* strbcs r12,[r0] */
+	ldrbmi r2, [r1], #1
+	ldrbcs r3, [r1], #1
+	ldrbcs r12,[r1]
+	strbmi r2, [r0], #1
+	strbcs r3, [r0], #1
+	strbcs r12,[r0]
 
 	/* we're done! restore sp and spilled registers and return */
 	add     sp,  sp, #28

Re: [PATCH] convert arm memcpy asm to UAL, remove .word hacks

[Khem Raj]

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> On Oct 18, 2015, at 5:17 PM, Rich Felker <dalias@libc.org> wrote:
> 
> I've found that, contrary to the message in commit
> 9367fe926196f407705bb07cd29c6e40eb1774dd, all relevant gas versions
> actually do support .syntax unified, and assemble memcpy.s
> successfully with the attached patch applied. If there are no
> objections I'd like to go ahead and commit it. The only remaining
> .word hacks I'm aware of are in setjmp and longjmp, but they may still
> be needed to avoid wrongly flagging plain EABI (softfloat) binaries
> as needing hard float.

IIRC .syntax should not affect the fp ABI assumptions, Its plainly for unifying arm/thumb-ness
in asm files and .eabi_attribute is the directive which could set FP ABI and I don’t see it
being set in asm file which means it will be set depending on compiler cmdline.


> I'd really like some feedback on what the issues
> with that are and how to best avoid problems. Hopefully we can make
> the transition to UAL syntax quickly in the next release cycle and get
> Cortex-M support (with the new ARM FDPIC ABI).
> 
> Rich
> <arm-ual1.diff>


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Re: [PATCH] convert arm memcpy asm to UAL, remove .word hacks

[Rich Felker]

On Mon, Oct 19, 2015 at 02:07:53PM -0700, Khem Raj wrote:
> 
> > On Oct 18, 2015, at 5:17 PM, Rich Felker <dalias@libc.org> wrote:
> > 
> > I've found that, contrary to the message in commit
> > 9367fe926196f407705bb07cd29c6e40eb1774dd, all relevant gas versions
> > actually do support .syntax unified, and assemble memcpy.s
> > successfully with the attached patch applied. If there are no
> > objections I'd like to go ahead and commit it. The only remaining
> > .word hacks I'm aware of are in setjmp and longjmp, but they may still
> > be needed to avoid wrongly flagging plain EABI (softfloat) binaries
> > as needing hard float.
> 
> IIRC .syntax should not affect the fp ABI assumptions, Its plainly
> for unifying arm/thumb-ness in asm files and .eabi_attribute is the
> directive which could set FP ABI and I don’t see it being set in asm
> file which means it will be set depending on compiler cmdline.

Right now setjmp and longjmp use .word to encode the instrutions:

	stc p11, cr8, [ip], #64
	ldc p11, cr8, [ip], #64

because UAL does not permit them. Switching to the forms:

	vstmia ip!, {d8-d15}
	vldmia ip!, {d8-d15}

would of course work, but these are floating point instructions, so
they're not accessible without using .fpu, and then the object file is
tagged as needing fpu, despite these instructions being needed even
for no-fpu builds and only executed conditionally. (They're needed
conditionally because, even if libc is soft ABI, the caller could be
using "softfp" model, and in that case longjmp needs to be able to
restore call-saved fp registers that have been modified between setjmp
and longjmp.)

Do you know a viable way to include these instructions without the
file getting an ABI-tag marking it as requiring fpu?

Rich