Re: [PATCH v3] Add PowerPC soft-float support

[Rich Felker <dalias@libc.org>]

On Mon, Jan 25, 2016 at 01:20:52PM +0100, Felix Fietkau wrote:
> Some PowerPC CPUs (e.g. Freescale MPC85xx) have a completely different
> instruction set for floating point operations (SPE).
> Executing regular PowerPC floating point instructions results in
> "Illegal instruction" errors.
> 
> Make it possible to run these devices in soft-float mode.

If their fpu is ieee conforming (this is probably a big if) it should
be possible for them to run in hard-float mode too, but the ABI is
still the soft-float ABI since floating point args and return values
get passed in GP registers. Just one question:

> diff --git a/arch/powerpc/bits/fenv.h b/arch/powerpc/bits/fenv.h
> index 2f722e6..c5a3e5c 100644
> --- a/arch/powerpc/bits/fenv.h
> +++ b/arch/powerpc/bits/fenv.h
> @@ -1,3 +1,7 @@
> +#ifdef _SOFT_FLOAT
> +#define FE_ALL_EXCEPT 0
> +#define FE_TONEAREST  0
> +#else
>  #define FE_TONEAREST	0
>  #define FE_TOWARDZERO	1
>  #define FE_UPWARD	2
> @@ -24,6 +28,7 @@

Does the _SOFT_FLOAT macro accurately represent that the "soft float
ABI" (float args/returns in GP registers) is being used, or is it only
defined when floating point has been completely disabled?

Aside from this question, the patch looks great. Thanks!

Rich