From mboxrd@z Thu Jan 1 00:00:00 1970 X-Msuck: nntp://news.gmane.org/gmane.linux.lib.musl.general/9719 Path: news.gmane.org!not-for-mail From: "dalias@libc.org" Newsgroups: gmane.linux.lib.musl.general Subject: Re: [PATCH] Fix pthread_arch.h for microMIPS Date: Mon, 21 Mar 2016 13:42:55 -0400 Message-ID: <20160321174254.GD21636@brightrain.aerifal.cx> References: Reply-To: musl@lists.openwall.com NNTP-Posting-Host: plane.gmane.org Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii X-Trace: ger.gmane.org 1458582191 26345 80.91.229.3 (21 Mar 2016 17:43:11 GMT) X-Complaints-To: usenet@ger.gmane.org NNTP-Posting-Date: Mon, 21 Mar 2016 17:43:11 +0000 (UTC) To: musl@lists.openwall.com Original-X-From: musl-return-9732-gllmg-musl=m.gmane.org@lists.openwall.com Mon Mar 21 18:43:10 2016 Return-path: Envelope-to: gllmg-musl@m.gmane.org Original-Received: from mother.openwall.net ([195.42.179.200]) by plane.gmane.org with smtp (Exim 4.69) (envelope-from ) id 1ai3rC-0001O7-8B for gllmg-musl@m.gmane.org; Mon, 21 Mar 2016 18:43:10 +0100 Original-Received: (qmail 5324 invoked by uid 550); 21 Mar 2016 17:43:08 -0000 Mailing-List: contact musl-help@lists.openwall.com; run by ezmlm Precedence: bulk List-Post: List-Help: List-Unsubscribe: List-Subscribe: List-ID: Original-Received: (qmail 5303 invoked from network); 21 Mar 2016 17:43:07 -0000 Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.5.21 (2010-09-15) Original-Sender: Rich Felker Xref: news.gmane.org gmane.linux.lib.musl.general:9719 Archived-At: On Mon, Mar 21, 2016 at 10:01:02AM +0000, Jaydeep Patil wrote: > Hi Rich, > > The patch fixes a link time error when compiled for microMIPS. The > pthread_self() function has been modified to use rdhwr instruction > instead of .word directive. > The change has been done for both clang and gcc. Functions > containing .word are not compiled for microMIPS. > > Please refer to https://github.com/JaydeepIMG/musl-1/tree/fix_rdhwr_for_umips for details. > > > > >From 09e4e395d9f1538edb548ffaa02db74e8e11701e Mon Sep 17 00:00:00 2001 > From: Jaydeep Patil > Date: Mon, 21 Mar 2016 09:53:37 +0000 > Subject: [PATCH] Use rdhwr insn instead of .word for microMIPS > > --- > arch/mips/pthread_arch.h | 10 ++-------- > arch/mips64/pthread_arch.h | 9 ++------- > 2 files changed, 4 insertions(+), 15 deletions(-) > > diff --git a/arch/mips/pthread_arch.h b/arch/mips/pthread_arch.h > index 8a49965..30e2394 100644 > --- a/arch/mips/pthread_arch.h > +++ b/arch/mips/pthread_arch.h > @@ -1,13 +1,7 @@ > static inline struct pthread *__pthread_self() > { > -#ifdef __clang__ > - char *tp; > - __asm__ __volatile__ (".word 0x7c03e83b ; move %0, $3" : "=r" (tp) : : "$3" ); > -#else > - register char *tp __asm__("$3"); > - /* rdhwr $3,$29 */ > - __asm__ __volatile__ (".word 0x7c03e83b" : "=r" (tp) ); > -#endif > + register char *tp; > + __asm__ __volatile__ ("rdhwr %0,$29" : "=r" (tp)); > return (pthread_t)(tp - 0x7000 - sizeof(struct pthread)); > } You can't remove the register constraint to use $3 here; the reason for the constraint is not that the opcode is hard-coded, but that the kernel's fast-path emulation for MIPS-I, MIPS-II, and MIPS32r1 cpus that lack support for this hardware register only works when $3 is used as the destination register. Otherwise a very slow path for emulation is taken. (On our part, this probably should be documented in a comment -- sorry it's not.) There are probably other reasons we're using .word instead of the mnemonic here too; I suspect it fails to assemble without .set to a proper ISA level or sufficient -march. This needs to be checked. Is there a reason the .word doesn't work on microMIPS? I thought the 32-bit opcodes were the same but maybe I'm mistaken. Rich