From: Rich Felker <dalias@libc.org>
To: musl@lists.openwall.com
Subject: Re: [MUSL] MIPS64 N32 port
Date: Mon, 18 Apr 2016 01:28:08 -0400 [thread overview]
Message-ID: <20160418052808.GK21636@brightrain.aerifal.cx> (raw)
In-Reply-To: <BD7773622145634B952E5B54ACA8E349AA24DA07@PUMAIL01.pu.imgtec.org>
[-- Attachment #1: Type: text/plain, Size: 481 bytes --]
On Mon, Apr 11, 2016 at 03:40:03AM +0000, Jaydeep Patil wrote:
> >Otherwise, it looks very good. Thanks for working on this and for your
> >patience. If the above suggested changes look okay with you I can make
> >them and commit it.
>
> Thanks for the review.
> Could you please commit it?
Sorry for the delay -- I've just been busy with other things. I've
committed it now. For reference, attached is a diff of what I applied
vs your last submitted patch.
Thanks again.
Rich
[-- Attachment #2: n32_changes.diff --]
[-- Type: text/plain, Size: 2533 bytes --]
--- mipsn32port_v1.patch 2016-04-07 16:49:02.701942417 +0000
+++ x 2016-04-12 17:29:31.897431250 +0000
@@ -1,9 +1,9 @@
diff --git a/arch/mipsn32/atomic_arch.h b/arch/mipsn32/atomic_arch.h
new file mode 100644
-index 0000000..1248d17
+index 0000000..ccc3878
--- /dev/null
+++ b/arch/mipsn32/atomic_arch.h
-@@ -0,0 +1,58 @@
+@@ -0,0 +1,52 @@
+#if __mips_isa_rev < 6
+#define LLSC_M "m"
+#else
@@ -49,13 +49,7 @@
+#define a_barrier a_barrier
+static inline void a_barrier()
+{
-+#if __mips < 2
-+ /* mips2 sync, but using too many directives causes
-+ * gcc not to inline it, so encode with .long instead. */
-+ __asm__ __volatile__ (".long 0xf" : : : "memory");
-+#else
+ __asm__ __volatile__ ("sync" : : : "memory");
-+#endif
+}
+
+#define a_pre_llsc a_barrier
@@ -2200,30 +2194,17 @@
+#define VDSO_CGT_SYM "__vdso_clock_gettime"
+#define VDSO_CGT_VER "LINUX_2.6"
diff --git a/configure b/configure
-index 969671d..dbc0198 100755
+index 969671d..53241ab 100755
--- a/configure
+++ b/configure
-@@ -307,6 +307,7 @@ i?86*) ARCH=i386 ;;
- x86_64-x32*|x32*|x86_64*x32) ARCH=x32 ;;
- x86_64-nt64*) ARCH=nt64 ;;
- x86_64*) ARCH=x86_64 ;;
-+mipsn32) ARCH=mipsn32 ;;
- mips64*) ARCH=mips64 ;;
- mips*) ARCH=mips ;;
- microblaze*) ARCH=microblaze ;;
-@@ -611,6 +612,12 @@ if test "$ARCH" = "aarch64" ; then
- trycppif __AARCH64EB__ "$t" && SUBARCH=${SUBARCH}_be
+@@ -618,6 +618,7 @@ trycppif __mips_soft_float "$t" && SUBARCH=${SUBARCH}-sf
fi
-+if test "$ARCH" = "mipsn32" ; then
-+trycppif "__mips_isa_rev >= 6" "$t" && SUBARCH=${SUBARCH}r6
-+trycppif "_MIPSEL || __MIPSEL || __MIPSEL__" "$t" && SUBARCH=${SUBARCH}el
-+trycppif __mips_soft_float "$t" && SUBARCH=${SUBARCH}-sf
-+fi
-+
- if test "$ARCH" = "mips" ; then
+ if test "$ARCH" = "mips64" ; then
++trycppif "_MIPS_SIM != _ABI64" "$t" && ARCH=mipsn32
trycppif "__mips_isa_rev >= 6" "$t" && SUBARCH=${SUBARCH}r6
trycppif "_MIPSEL || __MIPSEL || __MIPSEL__" "$t" && SUBARCH=${SUBARCH}el
+ trycppif __mips_soft_float "$t" && SUBARCH=${SUBARCH}-sf
diff --git a/crt/mipsn32/crti.s b/crt/mipsn32/crti.s
new file mode 100644
index 0000000..14fa28d
@@ -2542,15 +2523,14 @@
+ nop
diff --git a/src/thread/mipsn32/__unmapself.s b/src/thread/mipsn32/__unmapself.s
new file mode 100644
-index 0000000..771f8b3
+index 0000000..4b032e5
--- /dev/null
+++ b/src/thread/mipsn32/__unmapself.s
-@@ -0,0 +1,10 @@
+@@ -0,0 +1,9 @@
+.set noreorder
+.global __unmapself
+.type __unmapself,@function
+__unmapself:
-+ move $sp, $25
+ li $2, 6011
+ syscall
+ li $4, 0
next prev parent reply other threads:[~2016-04-18 5:28 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-03-16 11:56 Jaydeep Patil
2016-03-17 19:25 ` Rich Felker
2016-03-18 4:11 ` Jaydeep Patil
2016-04-05 4:44 ` Jaydeep Patil
2016-04-05 5:02 ` Rich Felker
2016-04-05 5:57 ` Jaydeep Patil
2016-04-10 0:48 ` Rich Felker
2016-04-11 3:40 ` Jaydeep Patil
2016-04-18 5:28 ` Rich Felker [this message]
2016-04-18 9:16 ` Jaydeep Patil
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