On Thu, Dec 08, 2016 at 04:11:16PM -0500, Rich Felker wrote:
> On Tue, Dec 06, 2016 at 11:52:29PM -0600, Rob Landley wrote:
> > Added support for the Cortex-M.
> > ------------------------------------------------------------------------
> > Index: src/internal/arm/syscall.s
> > ===================================================================
> > --- src/internal/arm/syscall.s	(revision 4919)
> > +++ src/internal/arm/syscall.s	(revision 4920)
> > @@ -11,5 +11,6 @@
> >  	svc 0
> >  	ldmfd sp!,{r4,r5,r6,r7}
> >  	tst lr,#1
> > +        it eq
> >  	moveq pc,lr
> >  	bx lr
> 
> There's a gas option -Wa,-mimplicit-it=always that will make these
> kind of changes unnecessary. I think it's preferable to just have
> musl's configure always add that option when targeting arm if it's
> accepted by the toolchain. Otherwise new code might get added without
> checking that it builds as thumb.

I dug up the changes I made to get it to build (not run; atomics.s is
broken) as thumb-only; see attached. Note that the atomics.s part of
the diff actively breaks the code so that it won't work even as arm
code.

I'll see if I can come up with a good solution for the atomics. One
thing I do need to know is how the thread pointer is supposed to be
read on cortex-m, since afaik the coprocessor register normally used
does not exist. Does the kernel trap and emulate the coprocessor
register, or is there some other mechanism that must be used?

Rich