From mboxrd@z Thu Jan 1 00:00:00 1970 X-Msuck: nntp://news.gmane.org/gmane.linux.lib.musl.general/11235 Path: news.gmane.org!.POSTED!not-for-mail From: Rich Felker Newsgroups: gmane.linux.lib.musl.general Subject: Re: [MUSL] microMIPS32R2 O32 port Date: Wed, 12 Apr 2017 16:27:21 -0400 Message-ID: <20170412202721.GY17319@brightrain.aerifal.cx> References: <20170406161804.GM17319@brightrain.aerifal.cx> <20170407141941.GQ17319@brightrain.aerifal.cx> <20170412192535.GG2082@port70.net> Reply-To: musl@lists.openwall.com NNTP-Posting-Host: blaine.gmane.org Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii X-Trace: blaine.gmane.org 1492028854 10392 195.159.176.226 (12 Apr 2017 20:27:34 GMT) X-Complaints-To: usenet@blaine.gmane.org NNTP-Posting-Date: Wed, 12 Apr 2017 20:27:34 +0000 (UTC) User-Agent: Mutt/1.5.21 (2010-09-15) Cc: Jaydeep Patil To: musl@lists.openwall.com Original-X-From: musl-return-11250-gllmg-musl=m.gmane.org@lists.openwall.com Wed Apr 12 22:27:30 2017 Return-path: Envelope-to: gllmg-musl@m.gmane.org Original-Received: from mother.openwall.net ([195.42.179.200]) by blaine.gmane.org with smtp (Exim 4.84_2) (envelope-from ) id 1cyOrR-0002Zp-JJ for gllmg-musl@m.gmane.org; Wed, 12 Apr 2017 22:27:29 +0200 Original-Received: (qmail 26526 invoked by uid 550); 12 Apr 2017 20:27:33 -0000 Mailing-List: contact musl-help@lists.openwall.com; run by ezmlm Precedence: bulk List-Post: List-Help: List-Unsubscribe: List-Subscribe: List-ID: Original-Received: (qmail 26508 invoked from network); 12 Apr 2017 20:27:33 -0000 Content-Disposition: inline In-Reply-To: <20170412192535.GG2082@port70.net> Original-Sender: Rich Felker Xref: news.gmane.org gmane.linux.lib.musl.general:11235 Archived-At: On Wed, Apr 12, 2017 at 09:25:35PM +0200, Szabolcs Nagy wrote: > * Jaydeep Patil [2017-04-12 11:54:10 +0000]: > > Hi Rich, > > > > We can reuse existing MIPS code for microMIPS. There are places where we read from $ra must be compiled for MIPS. > > Please refer to https://github.com/JaydeepIMG/musl-1/tree/micromips32r2_v2 for modifications. > > > > is micromips a different encoding for mips instructions > that works on some cpus but not others? Yes, it's something like thumb or thumb2 on arm, or the riscv compressed isa. What I'm not clear on is whether there are micromips-only cpu models that can't execute normal mips. If so we probably need the ability to build musl as micromips, but as long as cpus which support both support interworking (calls between the two type of code in the same process) reasonably, I don't think there's any reason to consider it a different subarch. If not (that is, if all cpus that support micromips also support the normal mips isa) then I fail to see why there's any need to compile musl's asm files as micromips. They're not size or performance bottlenecks. Rich