From mboxrd@z Thu Jan 1 00:00:00 1970 X-Msuck: nntp://news.gmane.org/gmane.linux.lib.musl.general/11256 Path: news.gmane.org!.POSTED!not-for-mail From: Rich Felker Newsgroups: gmane.linux.lib.musl.general Subject: Re: [MUSL] microMIPS32R2 O32 port Date: Fri, 21 Apr 2017 09:33:00 -0400 Message-ID: <20170421133300.GE17319@brightrain.aerifal.cx> References: <20170406161804.GM17319@brightrain.aerifal.cx> <20170407141941.GQ17319@brightrain.aerifal.cx> <20170412192535.GG2082@port70.net> <20170412202721.GY17319@brightrain.aerifal.cx> <20170413090036.GH2082@port70.net> Reply-To: musl@lists.openwall.com NNTP-Posting-Host: blaine.gmane.org Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii X-Trace: blaine.gmane.org 1492781597 14487 195.159.176.226 (21 Apr 2017 13:33:17 GMT) X-Complaints-To: usenet@blaine.gmane.org NNTP-Posting-Date: Fri, 21 Apr 2017 13:33:17 +0000 (UTC) User-Agent: Mutt/1.5.21 (2010-09-15) Cc: Szabolcs Nagy , "musl@lists.openwall.com" , Andre McCurdy To: Jaydeep Patil Original-X-From: musl-return-11271-gllmg-musl=m.gmane.org@lists.openwall.com Fri Apr 21 15:33:12 2017 Return-path: Envelope-to: gllmg-musl@m.gmane.org Original-Received: from mother.openwall.net ([195.42.179.200]) by blaine.gmane.org with smtp (Exim 4.84_2) (envelope-from ) id 1d1YgS-0003e5-La for gllmg-musl@m.gmane.org; Fri, 21 Apr 2017 15:33:12 +0200 Original-Received: (qmail 24365 invoked by uid 550); 21 Apr 2017 13:33:17 -0000 Mailing-List: contact musl-help@lists.openwall.com; run by ezmlm Precedence: bulk List-Post: List-Help: List-Unsubscribe: List-Subscribe: List-ID: Original-Received: (qmail 24346 invoked from network); 21 Apr 2017 13:33:16 -0000 Content-Disposition: inline In-Reply-To: Original-Sender: Rich Felker Xref: news.gmane.org gmane.linux.lib.musl.general:11256 Archived-At: On Thu, Apr 13, 2017 at 10:37:05AM +0000, Jaydeep Patil wrote: > Hi Szabolcs, > > Please find the attached patch. I still don't follow the motivation of all the changes in this patch. See comments below: > [...] > diff --git a/arch/mips/crt_arch.h b/arch/mips/crt_arch.h > index 9fc50d7..78832b0 100644 > --- a/arch/mips/crt_arch.h > +++ b/arch/mips/crt_arch.h > @@ -1,6 +1,7 @@ > __asm__( > ".set push\n" > ".set noreorder\n" > +".set nomicromips\n" > ".text \n" > ".global _" START "\n" > ".global " START "\n" Is there a need for crt1.o (or other users of this file like dlstart/rcrt1) to be built as plain mips rather than micromips? If so, please explain. Arbitrary changes like this without an explanation of why they're being made (what was broken before, and why this is the correct fix) are not acceptable. > diff --git a/arch/mips/reloc.h b/arch/mips/reloc.h > index b3d59a4..772b3aa 100644 > --- a/arch/mips/reloc.h > +++ b/arch/mips/reloc.h > @@ -36,15 +36,23 @@ > #define CRTJMP(pc,sp) __asm__ __volatile__( \ > "move $sp,%1 ; jr %0" : : "r"(pc), "r"(sp) : "memory" ) > > +/* > + * When compiled for microMIPS, .align makes sure that .gpword > + * is placed at word boundary. $ra must point to first .gpword. > + * ISA bit of $ra must be cleared for microMIPS before using it > + * as a base address. For MIPS, ISA bit is always zero. > +*/ > #define GETFUNCSYM(fp, sym, got) __asm__ ( \ > ".hidden " #sym "\n" \ > ".set push \n" \ > ".set noreorder \n" \ > + " .align 2 \n" \ > " bal 1f \n" \ > " nop \n" \ > " .gpword . \n" \ > " .gpword " #sym " \n" \ > - "1: lw %0, ($ra) \n" \ > + "1: ins $ra, $0, 0, 1 \n" \ > + " lw %0, ($ra) \n" \ > " subu %0, $ra, %0 \n" \ > " lw $ra, 4($ra) \n" \ > " addu %0, %0, $ra \n" \ By this, do you mean that .gpword is producing a value that's relative to the actual byte position of the directive rather than the logical (ISA bit set) value of "." at the point of .gpword? > diff --git a/src/thread/mips/syscall_cp.s b/src/thread/mips/syscall_cp.s > index d284626..9c5f55e 100644 > --- a/src/thread/mips/syscall_cp.s > +++ b/src/thread/mips/syscall_cp.s > @@ -1,5 +1,5 @@ > .set noreorder > - > +.set nomicromips > .global __cp_begin > .hidden __cp_begin > .type __cp_begin,@function I'm also unclear on the motivation of this one. Before (v1) you had a lot of changes to replace .s files with something micromips-compatible (removing branch delay slots); now (v2) those changes are not included. So are .s files even being built as micromips at all? If not, why is the above needed? If so, how do the files with delay slots work? Rich