Re: [PATCH] fix arm run-time abi string functions

[Szabolcs Nagy <nsz@port70.net>]

* Szabolcs Nagy <nsz@port70.net> [2017-06-18 20:50:07 +0200]:

> * Alexander Monakov <amonakov@ispras.ru> [2017-06-18 15:14:51 +0300]:
> > Sorry for a bit of extreme nit-picking, but
> > 
> > On Tue, 21 Feb 2017, Szabolcs Nagy wrote:
> > > +__aeabi_memmove8:
> > > +__aeabi_memmove4:
> > > +__aeabi_memmove:
> > > +	cmp   r0, r1
> > > +	bls   2f
> > > +	cmp   r2, #0
> > > +	bxeq  lr
> > > +	add   r0, r0, r2
> > > +	add   r2, r1, r2
> > > +1:	ldrb  r3, [r2, #-1]!
> > > +	cmp   r1, r2
> > > +	strb  r3, [r0, #-1]!
> > > +	bne   1b
> > > +	bx    lr
> > > +__aeabi_memcpy8:
> > > +__aeabi_memcpy4:
> > > +__aeabi_memcpy:
> > > +2:	cmp   r2, #0
> > > +	bxeq  lr
> > > +	sub   r0, r0, #1
> > > +	add   r2, r1, r2
> > > +1:	ldrb  r3, [r1], #1
> > > +	cmp   r1, r2
> > > +	strb  r3, [r0, #1]!
> > > +	bne   1b
> > > +	bx    lr
> > 
> > here it's possible to hoist and deduplicate 'cmp r2, #0; bxeq lr' by placing it
> > prior to the direction check.
> > 
> 
> i dont think there is a difference
> (either way, both functions need to do this cmp once,
> the executed insns are the same you just changed the
> ordering a bit)
> 
> > > +__aeabi_memclr8:
> > > +__aeabi_memclr4:
> > > +__aeabi_memclr:
> > > +	mov   r2, #0
> > > +__aeabi_memset8:
> > > +__aeabi_memset4:
> > > +__aeabi_memset:
> > > +	cmp   r1, #0
> > > +	bxeq  lr
> > > +	and   r2, r2, #255
> > 
> > here I don't see why the 'and' is useful, I don't think the following strb
> > needs high bits cleared?
> > 
> 
> indeed
> (i wrote naive c code and compiled with gcc..
> for some reason it did the and so i kept it, but
> strb seems to ignore top bits according to spec)
> 
> shall i resend without and?
> 

i cannot reproduce the gcc issue with and now, however..

> > > +	add   r1, r0, r1
> > > +1:	strb  r2, [r0], #1

it seems strb with postindex+writeback is armv6t,
so does not work in armv4t, i'll send an updated patch.

> > > +	cmp   r1, r0
> > > +	bne   1b
> > > +	bx    lr
> > 
> > Alexander