From mboxrd@z Thu Jan 1 00:00:00 1970 X-Msuck: nntp://news.gmane.org/gmane.linux.lib.musl.general/11584 Path: news.gmane.org!.POSTED!not-for-mail From: Rich Felker Newsgroups: gmane.linux.lib.musl.general Subject: Re: [PATCH] powerpc64le: Add single instruction math functions Date: Fri, 23 Jun 2017 20:55:39 -0400 Message-ID: <20170624005539.GT1627@brightrain.aerifal.cx> References: <20170623193533.GO1627@brightrain.aerifal.cx> <594DB66E.7030009@adelielinux.org> Reply-To: musl@lists.openwall.com NNTP-Posting-Host: blaine.gmane.org Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii X-Trace: blaine.gmane.org 1498265752 22424 195.159.176.226 (24 Jun 2017 00:55:52 GMT) X-Complaints-To: usenet@blaine.gmane.org NNTP-Posting-Date: Sat, 24 Jun 2017 00:55:52 +0000 (UTC) User-Agent: Mutt/1.5.21 (2010-09-15) To: musl@lists.openwall.com Original-X-From: musl-return-11597-gllmg-musl=m.gmane.org@lists.openwall.com Sat Jun 24 02:55:48 2017 Return-path: Envelope-to: gllmg-musl@m.gmane.org Original-Received: from mother.openwall.net ([195.42.179.200]) by blaine.gmane.org with smtp (Exim 4.84_2) (envelope-from ) id 1dOZMa-0005Z4-4M for gllmg-musl@m.gmane.org; Sat, 24 Jun 2017 02:55:48 +0200 Original-Received: (qmail 9618 invoked by uid 550); 24 Jun 2017 00:55:51 -0000 Mailing-List: contact musl-help@lists.openwall.com; run by ezmlm Precedence: bulk List-Post: List-Help: List-Unsubscribe: List-Subscribe: List-ID: Original-Received: (qmail 9600 invoked from network); 24 Jun 2017 00:55:51 -0000 Content-Disposition: inline In-Reply-To: <594DB66E.7030009@adelielinux.org> Original-Sender: Rich Felker Xref: news.gmane.org gmane.linux.lib.musl.general:11584 Archived-At: On Fri, Jun 23, 2017 at 07:46:38PM -0500, A. Wilcox wrote: > -----BEGIN PGP SIGNED MESSAGE----- > Hash: SHA256 > > On 23/06/17 14:53, David Edelsohn wrote: > > On Fri, Jun 23, 2017 at 3:35 PM, Rich Felker > > wrote: > >> On Wed, Jun 21, 2017 at 10:53:13AM -0400, David Edelsohn wrote: > >>> The following two patches are a start at single instruction > >>> math functions for PowerPC64 architecture. Although PPC64LE > >>> Linux and ELFv2 ABI require Power8 as the minimum > >>> architecture, I have added guards that fallback to C code for > >>> earlier architectures. > >> > >> Indeed, musl uses the ELFv2 ABI (minus its gratuitous mandate of > >> minimum ISA level) for both little and big endian powerpc64, > >> and I think we have users of both (people running it on old > >> powerbooks, etc.). > >> > >> Am I reading correctly that sqrt, fma, and fabs are available > >> even in the lowest powerpc64 ISA, and don't need preprocessor > >> conditionals? > > > > fabs and fma are part of the base ISA for Power processors that > > include floating point support. fsqrt originally was optional > > feature in the distant past (General Purpose group of optional > > instructions), but is required in the ISA for Power processors. > > > > Thanks, David > > > > Chiming in as one of the heavy users/developers involved with musl/ppc. > > I can confirm FSQRT exists on the oldest PPC64 chip I have - a 970FX > from 2003 - but it is indeed optional. (I didn't bother checking the > actual IBM chips because they're all on the higher end.) The Linux > kernel actually has support for emulating the instruction on PowerPC > chips where it wasn't implemented. See arch/powerpc/math-emu/fsqrt.c > in the kernel tree. > > It depends on CONFIG_MATH_EMULATION_HW_UNIMPLEMENTED (or > CONFIG_MATH_EMULATION_FULL), but most (all?) distros that ship PPC > kernels have that knob turned on, as far as I can tell. > > So this should be safe. The worst case scenario is that distros would > need to twiddle a config knob in the kernel. > > All the best, Thanks for the feedback. If it ends up being problematic, but gcc has a way to tell if -march is for a model with or without it, please feel free to submit a patch to make the use conditional. Rich