From mboxrd@z Thu Jan 1 00:00:00 1970 X-Msuck: nntp://news.gmane.org/gmane.linux.lib.musl.general/12191 Path: news.gmane.org!.POSTED!not-for-mail From: Rich Felker Newsgroups: gmane.linux.lib.musl.general Subject: Re: [PATCH] arm: provide a_ctz_l and a_ctz_64 helper functions Date: Thu, 30 Nov 2017 19:46:25 -0500 Message-ID: <20171201004625.GL1627@brightrain.aerifal.cx> References: <1512086412-30631-1-git-send-email-armccurdy@gmail.com> Reply-To: musl@lists.openwall.com NNTP-Posting-Host: blaine.gmane.org Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii X-Trace: blaine.gmane.org 1512089197 7859 195.159.176.226 (1 Dec 2017 00:46:37 GMT) X-Complaints-To: usenet@blaine.gmane.org NNTP-Posting-Date: Fri, 1 Dec 2017 00:46:37 +0000 (UTC) User-Agent: Mutt/1.5.21 (2010-09-15) To: musl@lists.openwall.com Original-X-From: musl-return-12207-gllmg-musl=m.gmane.org@lists.openwall.com Fri Dec 01 01:46:34 2017 Return-path: Envelope-to: gllmg-musl@m.gmane.org Original-Received: from mother.openwall.net ([195.42.179.200]) by blaine.gmane.org with smtp (Exim 4.84_2) (envelope-from ) id 1eKZTM-0001iB-E0 for gllmg-musl@m.gmane.org; Fri, 01 Dec 2017 01:46:32 +0100 Original-Received: (qmail 22465 invoked by uid 550); 1 Dec 2017 00:46:37 -0000 Mailing-List: contact musl-help@lists.openwall.com; run by ezmlm Precedence: bulk List-Post: List-Help: List-Unsubscribe: List-Subscribe: List-ID: Original-Received: (qmail 22447 invoked from network); 1 Dec 2017 00:46:37 -0000 Content-Disposition: inline In-Reply-To: <1512086412-30631-1-git-send-email-armccurdy@gmail.com> Original-Sender: Rich Felker Xref: news.gmane.org gmane.linux.lib.musl.general:12191 Archived-At: On Thu, Nov 30, 2017 at 04:00:12PM -0800, Andre McCurdy wrote: > Provide an ARM specific a_ctz_l helper function for architecture > versions for which it can be implemented efficiently via the "rbit" > instruction (ie all Thumb-2 capable versions of ARM v6 and above). > > Signed-off-by: Andre McCurdy > --- > arch/arm/atomic_arch.h | 22 ++++++++++++++++++++++ > 1 file changed, 22 insertions(+) > > diff --git a/arch/arm/atomic_arch.h b/arch/arm/atomic_arch.h > index 6e2e3b4..9242df8 100644 > --- a/arch/arm/atomic_arch.h > +++ b/arch/arm/atomic_arch.h > @@ -91,4 +91,26 @@ static inline int a_clz_32(uint32_t x) > return x; > } > > +#if __ARM_ARCH_6T2__ || __ARM_ARCH_7A__ || __ARM_ARCH_7R__ || __ARM_ARCH >= 7 > + > +#define a_ctz_l a_ctz_l > +static inline int a_ctz_l(unsigned long x) > +{ > + uint32_t xr; > + __asm__ ("rbit %0, %1" : "=r"(xr) : "r"(x)); > + return a_clz_32(xr); > +} > + > +#define a_ctz_64 a_ctz_64 > +static inline int a_ctz_64(uint64_t x) > +{ > + uint32_t y = x; > + if (!y) { > + y = x>>32; > + return 32 + a_ctz_l(y); > + } > + return a_ctz_l(y); > +} > + > +#endif > #endif > -- > 1.9.1 Looks mostly good. I realize it's already done this way some other places, but I think it would make more sense to adjust src/internal/atomic.h to use a_ctz_l to define a_ctz_64, using the above, in cases where the arch defines the former but not the latter. This would eliminate the dupliation across atomic_arch.h files. Note that we can also provide ctz without rbit on older arm, via 31-a_clz_32(x&-x). This could probably also be done in src/internal/atomic.h, but I'm not sure it helps since ARM is probably the only arch with a clz but not ctz. Rich