From mboxrd@z Thu Jan 1 00:00:00 1970 X-Msuck: nntp://news.gmane.org/gmane.linux.lib.musl.general/12564 Path: news.gmane.org!.POSTED!not-for-mail From: Szabolcs Nagy Newsgroups: gmane.linux.lib.musl.general Subject: Re: clz instruction is unavailable for Thumb1 Date: Wed, 28 Feb 2018 11:43:05 +0100 Message-ID: <20180228104305.GN4418@port70.net> References: <1799b81c-10d6-c2ac-4411-6ee9808f2356@codeaurora.org> <20180228010110.GS1436@brightrain.aerifal.cx> <20180228021641.GT1436@brightrain.aerifal.cx> Reply-To: musl@lists.openwall.com NNTP-Posting-Host: blaine.gmane.org Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii X-Trace: blaine.gmane.org 1519814481 31818 195.159.176.226 (28 Feb 2018 10:41:21 GMT) X-Complaints-To: usenet@blaine.gmane.org NNTP-Posting-Date: Wed, 28 Feb 2018 10:41:21 +0000 (UTC) User-Agent: Mutt/1.9.1 (2017-09-22) To: musl@lists.openwall.com Original-X-From: musl-return-12580-gllmg-musl=m.gmane.org@lists.openwall.com Wed Feb 28 11:41:17 2018 Return-path: Envelope-to: gllmg-musl@m.gmane.org Original-Received: from mother.openwall.net ([195.42.179.200]) by blaine.gmane.org with smtp (Exim 4.84_2) (envelope-from ) id 1eqzAj-0007xS-6E for gllmg-musl@m.gmane.org; Wed, 28 Feb 2018 11:41:17 +0100 Original-Received: (qmail 19829 invoked by uid 550); 28 Feb 2018 10:43:19 -0000 Mailing-List: contact musl-help@lists.openwall.com; run by ezmlm Precedence: bulk List-Post: List-Help: List-Unsubscribe: List-Subscribe: List-ID: Original-Received: (qmail 19804 invoked from network); 28 Feb 2018 10:43:18 -0000 Mail-Followup-To: musl@lists.openwall.com Content-Disposition: inline In-Reply-To: Xref: news.gmane.org gmane.linux.lib.musl.general:12564 Archived-At: * Andre McCurdy [2018-02-27 19:00:58 -0800]: > On Tue, Feb 27, 2018 at 6:16 PM, Rich Felker wrote: > > On Tue, Feb 27, 2018 at 05:26:13PM -0800, Andre McCurdy wrote: > >> On Tue, Feb 27, 2018 at 5:01 PM, Rich Felker wrote: > >> > I forget what the situation with v6-m is, and whether/how it could be > >> > supportable. Is it really thumb1 or some thumb2 subset that fills > >> > deficiencies? > >> > >> It's Thumb1 plus BL, DMB, DSB, ISB, MRS and MSR from Thumb2. > > > > So that covers barrier but not atomics or thread pointer or syscalls, > > right? > > Thumb1 can make syscalls, but armv6-m has no atomics (the RTOS style > alternative being to disable interrupts around critical sections) and > no thread pointer (no coprocessors at all). > > > I'm not seeing how arm with only thumb1 plus the above can be a > > viable platform musl could run on, but maybe there are some kernel > > mechanisms to help..? > > I don't know if it's even possible to run a Linux kernel on these devices. > maybe this helps on linux: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=8fcd6c45f5a65621ec809b7866a3623e9a01d4ed