From mboxrd@z Thu Jan 1 00:00:00 1970 X-Msuck: nntp://news.gmane.org/gmane.linux.lib.musl.general/12854 Path: news.gmane.org!.POSTED!not-for-mail From: Szabolcs Nagy Newsgroups: gmane.linux.lib.musl.general Subject: Re: TLS issue on aarch64 Date: Tue, 29 May 2018 08:33:17 +0200 Message-ID: <20180529063316.GK4418@port70.net> References: <20180525145059.GG4418@port70.net> <20180526005415.GI4418@port70.net> <20180527003430.GG1392@brightrain.aerifal.cx> <20180528204730.GJ4418@port70.net> <20180528221521.GI1392@brightrain.aerifal.cx> Reply-To: musl@lists.openwall.com NNTP-Posting-Host: blaine.gmane.org Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii X-Trace: blaine.gmane.org 1527575487 31873 195.159.176.226 (29 May 2018 06:31:27 GMT) X-Complaints-To: usenet@blaine.gmane.org NNTP-Posting-Date: Tue, 29 May 2018 06:31:27 +0000 (UTC) User-Agent: Mutt/1.9.1 (2017-09-22) To: musl@lists.openwall.com Original-X-From: musl-return-12870-gllmg-musl=m.gmane.org@lists.openwall.com Tue May 29 08:31:23 2018 Return-path: Envelope-to: gllmg-musl@m.gmane.org Original-Received: from mother.openwall.net ([195.42.179.200]) by blaine.gmane.org with smtp (Exim 4.84_2) (envelope-from ) id 1fNYAE-0008Av-C4 for gllmg-musl@m.gmane.org; Tue, 29 May 2018 08:31:22 +0200 Original-Received: (qmail 25747 invoked by uid 550); 29 May 2018 06:33:30 -0000 Mailing-List: contact musl-help@lists.openwall.com; run by ezmlm Precedence: bulk List-Post: List-Help: List-Unsubscribe: List-Subscribe: List-ID: Original-Received: (qmail 25719 invoked from network); 29 May 2018 06:33:29 -0000 Mail-Followup-To: musl@lists.openwall.com Content-Disposition: inline In-Reply-To: <20180528221521.GI1392@brightrain.aerifal.cx> Xref: news.gmane.org gmane.linux.lib.musl.general:12854 Archived-At: * Rich Felker [2018-05-28 18:15:21 -0400]: > On Mon, May 28, 2018 at 10:47:31PM +0200, Szabolcs Nagy wrote: > > another issue with the patch is that if tp is aligned then pthread_t > > may not get aligned: > > > > tp == self + sizeof(pthread_t) - reserved > > This expression does not look correct; it would have tp point > somewhere inside of the pthread structure rather than just past the > end of it. > this is the current tp setup on aarch64, arm and sh4, see TP_ADJ we can just make tp = self+sizeof(pthread_t) but then there will be a small unused hole > Maybe your code is doing this to avoid wasted padding, but if so I > think that's a bad idea. It violates the invariant that the pthread > structure is at a constant offset from tp, which is needed for > efficient pthread_self and for access to fixed slots at the end of it > (like canary or dtv copy). > > > so sizeof(pthread_t) - reserved must be divisible with > > gcd(alignment of tp, alignof(pthread_t)) to be able to make both > > self and tp aligned. > > > > this is not an issue on current targets with current pthread_t, > > but we may want to decouple internal struct pthread alignment > > details and the abi reserved tls size, i.e. tp_adj could be like > > > > tp == alignup(self + sizeof(pthread_t) - reserved, alignof(pthread_t)) > > > > or we add a static assert that reserved and alignof(pthread_t) > > are not conflicting. > > Maybe I'm misunderstanding what "reserved" is, since you're talking > about a static assert...? > it is the abi reserved space after tp (the bfd linker calls it TCB_SIZE)