From mboxrd@z Thu Jan 1 00:00:00 1970 X-Msuck: nntp://news.gmane.org/gmane.linux.lib.musl.general/13256 Path: news.gmane.org!.POSTED!not-for-mail From: Rich Felker Newsgroups: gmane.linux.lib.musl.general Subject: Re: Cortex-M support / single float Date: Thu, 13 Sep 2018 11:39:25 -0400 Message-ID: <20180913153925.GJ1878@brightrain.aerifal.cx> References: Reply-To: musl@lists.openwall.com NNTP-Posting-Host: blaine.gmane.org Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii X-Trace: blaine.gmane.org 1536853053 28165 195.159.176.226 (13 Sep 2018 15:37:33 GMT) X-Complaints-To: usenet@blaine.gmane.org NNTP-Posting-Date: Thu, 13 Sep 2018 15:37:33 +0000 (UTC) User-Agent: Mutt/1.5.21 (2010-09-15) To: musl@lists.openwall.com Original-X-From: musl-return-13272-gllmg-musl=m.gmane.org@lists.openwall.com Thu Sep 13 17:37:29 2018 Return-path: Envelope-to: gllmg-musl@m.gmane.org Original-Received: from mother.openwall.net ([195.42.179.200]) by blaine.gmane.org with smtp (Exim 4.84_2) (envelope-from ) id 1g0TgO-0007FD-S8 for gllmg-musl@m.gmane.org; Thu, 13 Sep 2018 17:37:28 +0200 Original-Received: (qmail 13802 invoked by uid 550); 13 Sep 2018 15:39:37 -0000 Mailing-List: contact musl-help@lists.openwall.com; run by ezmlm Precedence: bulk List-Post: List-Help: List-Unsubscribe: List-Subscribe: List-ID: Original-Received: (qmail 13780 invoked from network); 13 Sep 2018 15:39:37 -0000 Content-Disposition: inline In-Reply-To: Original-Sender: Rich Felker Xref: news.gmane.org gmane.linux.lib.musl.general:13256 Archived-At: On Thu, Sep 13, 2018 at 12:30:45PM +0100, Jon Chesterfield wrote: > > note that a large part of the float code in libc is in the > > math library which expects efficient double arithmetics, > > i plan to rewrite the most important single precision math > > functions using double arithmetics, this gives significant > > benefits on all systems except ones with single precision > > only hw. > > I'm responsible for libm on an architecture with 32bit float in hardware > and 64bit float via integer ops. It's derived from musl because I like musl. > > Currently operations written in terms of double are rather slow. Would > upstream accept functions optimised for a 32bit float+int system? I haven't > written them yet but it's on the todo list. If implementations with float+int can be reasonably trusted to give comparable precision (and of course exact results for the functions specified to be exact), I don't see a reason not to accept them. How are exception flags handed on such archs? Are the double operations expected to set the flags in the single-precision fpu correctly? Or does it just have to be treated as a no-fenv arch? Rich