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From: Szabolcs Nagy <nsz@port70.net>
To: musl@lists.openwall.com
Subject: Re: TLSDESC register-preserving mess
Date: Wed, 10 Oct 2018 15:19:26 +0200	[thread overview]
Message-ID: <20181010131926.GT10209@port70.net> (raw)
In-Reply-To: <20181010012620.GL17110@brightrain.aerifal.cx>

* Rich Felker <dalias@libc.org> [2018-10-09 21:26:20 -0400]:
> As written, the aarch64 and arm asm save and restore float/vector
> registers around the call, but I don't think they're future-proof
> against ISA extensions that add more such registers; if libc were

at least on aarch64 for now the approach is to add new vector
registers to the tlsdesc clobber list in gcc (and document
this in the sysv abi, except that's not published yet).

the reasoning is that it makes it safe to use tlsdesc with
old dynamic linker (new vector registers overlap with old
ones so old dynamic linker can clobber them) without much
practical cost: it's unlikely that vector code needs to
access tls (in vectorized loops the address is hopefully
computed outside the loop and vector math code should not
use tls state in the fast path if it wants to be efficient)


  parent reply	other threads:[~2018-10-10 13:19 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-10-10  1:26 Rich Felker
2018-10-10  2:35 ` Rich Felker
2018-10-10 13:19 ` Szabolcs Nagy [this message]
2018-10-10 13:52   ` Rich Felker

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