From mboxrd@z Thu Jan 1 00:00:00 1970 X-Msuck: nntp://news.gmane.org/gmane.linux.lib.musl.general/13355 Path: news.gmane.org!.POSTED!not-for-mail From: Rich Felker Newsgroups: gmane.linux.lib.musl.general Subject: Re: TLSDESC register-preserving mess Date: Wed, 10 Oct 2018 09:52:41 -0400 Message-ID: <20181010135241.GN17110@brightrain.aerifal.cx> References: <20181010012620.GL17110@brightrain.aerifal.cx> <20181010131926.GT10209@port70.net> Reply-To: musl@lists.openwall.com NNTP-Posting-Host: blaine.gmane.org Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii X-Trace: blaine.gmane.org 1539179450 29956 195.159.176.226 (10 Oct 2018 13:50:50 GMT) X-Complaints-To: usenet@blaine.gmane.org NNTP-Posting-Date: Wed, 10 Oct 2018 13:50:50 +0000 (UTC) User-Agent: Mutt/1.5.21 (2010-09-15) To: musl@lists.openwall.com Original-X-From: musl-return-13371-gllmg-musl=m.gmane.org@lists.openwall.com Wed Oct 10 15:50:46 2018 Return-path: Envelope-to: gllmg-musl@m.gmane.org Original-Received: from mother.openwall.net ([195.42.179.200]) by blaine.gmane.org with smtp (Exim 4.84_2) (envelope-from ) id 1gAEsv-0007hG-US for gllmg-musl@m.gmane.org; Wed, 10 Oct 2018 15:50:46 +0200 Original-Received: (qmail 12014 invoked by uid 550); 10 Oct 2018 13:52:55 -0000 Mailing-List: contact musl-help@lists.openwall.com; run by ezmlm Precedence: bulk List-Post: List-Help: List-Unsubscribe: List-Subscribe: List-ID: Original-Received: (qmail 11996 invoked from network); 10 Oct 2018 13:52:54 -0000 Content-Disposition: inline In-Reply-To: <20181010131926.GT10209@port70.net> Original-Sender: Rich Felker Xref: news.gmane.org gmane.linux.lib.musl.general:13355 Archived-At: On Wed, Oct 10, 2018 at 03:19:26PM +0200, Szabolcs Nagy wrote: > * Rich Felker [2018-10-09 21:26:20 -0400]: > > As written, the aarch64 and arm asm save and restore float/vector > > registers around the call, but I don't think they're future-proof > > against ISA extensions that add more such registers; if libc were > > at least on aarch64 for now the approach is to add new vector > registers to the tlsdesc clobber list in gcc (and document > this in the sysv abi, except that's not published yet). > > the reasoning is that it makes it safe to use tlsdesc with > old dynamic linker (new vector registers overlap with old > ones so old dynamic linker can clobber them) without much > practical cost: it's unlikely that vector code needs to > access tls (in vectorized loops the address is hopefully > computed outside the loop and vector math code should not > use tls state in the fast path if it wants to be efficient) Any idea if other archs are willing to commit to the same? Even if they are, the second idea of getting rid of __tls_get_new entirely is still somewhat appealing, in that it makes all dynamic TLS access faster and reduces the amount of asm needed. But a committment not to add new call-saved registers to the TLSDESC ABIs would solve the immediate problem (albeit with some hwcap fiddling for 32-bit x86 where mmx, sse, etc. perhaps need to be saved conditionally). Rich