From mboxrd@z Thu Jan 1 00:00:00 1970 X-Msuck: nntp://news.gmane.org/gmane.linux.lib.musl.general/13896 Path: news.gmane.org!.POSTED.blaine.gmane.org!not-for-mail From: Rich Felker Newsgroups: gmane.linux.lib.musl.general Subject: Re: FE Exception triggered by comparison Date: Wed, 27 Feb 2019 15:35:03 -0500 Message-ID: <20190227203503.GX23599@brightrain.aerifal.cx> References: <20190227164225.GV23599@brightrain.aerifal.cx> <20190227172641.GW23599@brightrain.aerifal.cx> <20190227201608.GH21289@port70.net> Reply-To: musl@lists.openwall.com Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Injection-Info: blaine.gmane.org; posting-host="blaine.gmane.org:195.159.176.226"; logging-data="17269"; mail-complaints-to="usenet@blaine.gmane.org" User-Agent: Mutt/1.5.21 (2010-09-15) To: musl@lists.openwall.com Original-X-From: musl-return-13912-gllmg-musl=m.gmane.org@lists.openwall.com Wed Feb 27 21:35:18 2019 Return-path: Envelope-to: gllmg-musl@m.gmane.org Original-Received: from mother.openwall.net ([195.42.179.200]) by blaine.gmane.org with smtp (Exim 4.89) (envelope-from ) id 1gz5vC-0004Oo-8H for gllmg-musl@m.gmane.org; Wed, 27 Feb 2019 21:35:18 +0100 Original-Received: (qmail 5541 invoked by uid 550); 27 Feb 2019 20:35:16 -0000 Mailing-List: contact musl-help@lists.openwall.com; run by ezmlm Precedence: bulk List-Post: List-Help: List-Unsubscribe: List-Subscribe: List-ID: Original-Received: (qmail 5523 invoked from network); 27 Feb 2019 20:35:15 -0000 Content-Disposition: inline In-Reply-To: <20190227201608.GH21289@port70.net> Original-Sender: Rich Felker Xref: news.gmane.org gmane.linux.lib.musl.general:13896 Archived-At: On Wed, Feb 27, 2019 at 09:16:09PM +0100, Szabolcs Nagy wrote: > * Alexander Monakov [2019-02-27 22:48:02 +0300]: > > On Wed, 27 Feb 2019, Rich Felker wrote: > > > Ideally the compiler would be able to recognize portable (within IEEE) > > > patterns for floating point representation examination and optimize > > > them if there's a more efficient way to be able to do it for a > > > particular machine. > > > > There's a difference for sNaN operands: the bit-test version obviously > > is not going to raise "invalid", while comparing the fpu register with > > itself will. So I'm afraid the compiler wouldn't do that for x86 (but > > could for targets where an suitable instruction is available). > > using -fsignaling-nan is extremely rare, by default the transformation > is valid (but maybe tricky anyway). I'm not sure if I'd call transforming non-floating-point bit-manipulation code into a floating point instruction that alters exception flags "valid" regardless of the -fsignaling-nan state. It's one thing to say "this program isn't using and doesn't care about signaling nans [as floating point values]"; it's completely different to say "you can optimize integer operations as floating point without regard for how that affects fenv". Rich