From mboxrd@z Thu Jan 1 00:00:00 1970 X-Msuck: nntp://news.gmane.org/gmane.linux.lib.musl.general/14041 Path: news.gmane.org!.POSTED.blaine.gmane.org!not-for-mail From: Markus Wichmann Newsgroups: gmane.linux.lib.musl.general Subject: Re: Does TD point to itself intentionally? Date: Sat, 30 Mar 2019 17:36:09 +0100 Message-ID: <20190330163609.GD18043@voyager> References: <20190330103814.GB18043@voyager> <20190330143939.GI23599@brightrain.aerifal.cx> Reply-To: musl@lists.openwall.com Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: quoted-printable Injection-Info: blaine.gmane.org; posting-host="blaine.gmane.org:195.159.176.226"; logging-data="265719"; mail-complaints-to="usenet@blaine.gmane.org" User-Agent: Mutt/1.10.1 (2018-07-13) To: musl@lists.openwall.com Original-X-From: musl-return-14057-gllmg-musl=m.gmane.org@lists.openwall.com Sat Mar 30 17:36:36 2019 Return-path: Envelope-to: gllmg-musl@m.gmane.org Original-Received: from mother.openwall.net ([195.42.179.200]) by blaine.gmane.org with smtp (Exim 4.89) (envelope-from ) id 1hAGyA-00170z-Tf for gllmg-musl@m.gmane.org; Sat, 30 Mar 2019 17:36:34 +0100 Original-Received: (qmail 7431 invoked by uid 550); 30 Mar 2019 16:36:32 -0000 Mailing-List: contact musl-help@lists.openwall.com; run by ezmlm Precedence: bulk List-Post: List-Help: List-Unsubscribe: List-Subscribe: List-ID: Original-Received: (qmail 7410 invoked from network); 30 Mar 2019 16:36:31 -0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gmx.net; s=badeba3b8450; t=1553963780; bh=Q9PWJTBfxvSJWHhmvglfyUP47LrgYjE5zonND8vwH38=; h=X-UI-Sender-Class:Date:From:To:Subject:References:In-Reply-To; b=Jvmx/kflfyF5Hv/xGJ7gYc4BHbTw4vq0W8hEitaA3avG8TyTPF5qgWDLvDqfLvvQr b7gAcDUDMmBWFo0olES9CZZFw251AUeWBmcFEV2xbUAjPc7ldbrQqUwnIb0azUEu0D OmF6/uLBMATL2icaV9v3UeN5OhK21PO8/7GTDM1E= X-UI-Sender-Class: 01bb95c1-4bf8-414a-932a-4f6e2808ef9c Content-Disposition: inline In-Reply-To: <20190330143939.GI23599@brightrain.aerifal.cx> X-Provags-ID: V03:K1:/qiXUmY5903luypYnMvVw7eDMpk6ffqqfcrYG+XeGmY2aFKFBUZ zdi1VdKpL8gDLHkLK1GZ2pmc4gJ8J0hHKq3B6nWG53dgbROrMfHhGpulRjNYRbZLSX+368a tVbCxbV1xYSpRWbBy3X1ocUou8Kzv1wkCjtaqcMWo9a0ME6SffbYwOymiVNKKOFGIoBZLtV fhJ70PWtR0LOIlBIZrRDg== X-UI-Out-Filterresults: notjunk:1;V03:K0:koWiR9x1SsM=:2OxEotCch2vqHUOo7On5/D m3x7BrVm6lbfHjRqoilJajtlpksXqVev+es6G0w+QGKhINgrBgpH0KfQsgfUqxlLG28WmUhfR mDqZ9clL8a8DFrzRiArbZ7ARpCsYftr9QqUMKXpr822DeLxGq03UA/2DNxfFRk/jeFMgy6afl lQ1tYvu1ImgS21EQu/ha/2HQdSQv9LI2zJGQpQFgxjEJNPf0HDztzT+9Ry3a3DAzf41yNm7s5 TRnJ9Sz5gOPvb/4by3yn6Ufj8P3OkQ2AkKa65rHTj+g7D8ONpd1SwtP/X5q8MZQBBuTqiv3sc QVXa2hXwS532+9d/N/LavV7zzxzxHg6uM91ezPUKLTyiLk88gSdq18wPYLf8BubvM8/SbrjwM ENirgm65Dv2F+fdFRwmyEbq5bAKLokzg9ptkB6qXAze6QZVRyNNJWL/ej564L6CVBdVgVCRwQ 8usRZj3GYiv5LJEE5usRQxuZHCpqBv/bKaPikwz269PFTMAvSXdtur9bhJBL+KbdT2W3ImNGN zS8RmqLtMTVWBIpYMI5bDTR+n3pfvuVJkzfuV4JxImoRsJv/eD8vPDS0a2pSCyCb+rO6bSZhg thKvEbx8wd2d7ftE0qGetW1f5/cUL0Cr5BVJ3xt10dIWAICxgGPf9Dw6nCvHvyJXnrEmnSfWI hCYw1aFUPm3cKLJlXhCPZ02X3x1bE81s22fywLcN/plCfKYZ45Mqs12EmExLjIydQ5Qbt2ZuJ PYnXg5tVg8FKavhGCyMyhKBDsfRifBA8zwdMqDnFDud1uUQwVL2ERWnWUvklplmQ+9fxywvB Xref: news.gmane.org gmane.linux.lib.musl.general:14041 Archived-At: On Sat, Mar 30, 2019 at 10:39:39AM -0400, Rich Felker wrote: > This was able to be partly mitigated by adding some \n\n\n > to the asm... *facepalm* > That is so GCC... > No. Even a single insn to test the stored result of whether such a > feature is available (in practice it would take several and a branch) > is more expensive than loading from %fs:0. And even without having to > make a runtime test, it should be the same cost, possibly still more > expensive, than loading from %fs:0. > No, I meant, use wrfsbase instead of arch_prctl() in __set_thread_area(). But as far as I can see, on AMD64 and i386, __hwcap is just the EDX of CPUID function 1. But we'd need EBX bit 0 of CPUID function 7, with ECX =3D 0. > The effective address computed by lea would be relative to %fs or %gs. > It's not useful. > > Rich I just noticed that this fact is very well hidden in the documentation. It is never spelled out, but the docs do say that LEA calculates the effective address. And if you then open the AMD APM volume 1, and read up on what an effective address is, which you have to do under the heading "Memory Management", not "Effective Addresses", of course, *then* you will find a nice graphic that tells you that the effective address did not have segmentation applied, yet. And it also suggests that segmentation doesn't exist in 64-bit mode. Which is laughable, considering what we are talking about right now. So yeah, you do have to dig pretty deep to find that small potato. Are the Intel docs any better? If so, I might have to switch. Ciao, Markus