From mboxrd@z Thu Jan 1 00:00:00 1970 X-Msuck: nntp://news.gmane.org/gmane.linux.lib.musl.general/14662 Path: news.gmane.org!.POSTED.blaine.gmane.org!not-for-mail From: Rich Felker Newsgroups: gmane.linux.lib.musl.general Subject: Re: [PATCH] mips: add single-instruction math functions Date: Thu, 12 Sep 2019 13:57:25 -0400 Message-ID: <20190912175725.GC9017@brightrain.aerifal.cx> References: <20190911103224.504A15C44C@mx7.valuehost.ru> Reply-To: musl@lists.openwall.com Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Injection-Info: blaine.gmane.org; posting-host="blaine.gmane.org:195.159.176.226"; logging-data="20290"; mail-complaints-to="usenet@blaine.gmane.org" User-Agent: Mutt/1.5.21 (2010-09-15) Cc: musl@lists.openwall.com To: info@mobile-stream.com Original-X-From: musl-return-14678-gllmg-musl=m.gmane.org@lists.openwall.com Thu Sep 12 19:57:44 2019 Return-path: Envelope-to: gllmg-musl@m.gmane.org Original-Received: from mother.openwall.net ([195.42.179.200]) by blaine.gmane.org with smtp (Exim 4.89) (envelope-from ) id 1i8TLk-0005BG-P5 for gllmg-musl@m.gmane.org; Thu, 12 Sep 2019 19:57:44 +0200 Original-Received: (qmail 14331 invoked by uid 550); 12 Sep 2019 17:57:42 -0000 Mailing-List: contact musl-help@lists.openwall.com; run by ezmlm Precedence: bulk List-Post: List-Help: List-Unsubscribe: List-Subscribe: List-ID: Original-Received: (qmail 14310 invoked from network); 12 Sep 2019 17:57:41 -0000 Content-Disposition: inline In-Reply-To: <20190911103224.504A15C44C@mx7.valuehost.ru> Original-Sender: Rich Felker Xref: news.gmane.org gmane.linux.lib.musl.general:14662 Archived-At: On Wed, Sep 11, 2019 at 01:05:04PM +0300, info@mobile-stream.com wrote: > > non-commit text: > gcc puts annoying nop into the delay slot for these functions, e.g.: > abs.d $f0,$f12 > jr $ra > nop > is there any way to get rid of this without using pure .S? > > > > SQRT.fmt exists on MIPS II+ (float), MIPS III+ (double). > > ABS.fmt exists on MIPS I+ but only cores with ABS2008 flag in FCSR > implement the required behaviour. One other thing: can you confirm/cite that the mips sqrt instructions are correctly-rounded? I would assume so but this needs checking since there have been some low-end fpus that do things wrong (like early pre-vfp ARM ones). Rich