From mboxrd@z Thu Jan 1 00:00:00 1970 X-Msuck: nntp://news.gmane.org/gmane.linux.lib.musl.general/14670 Path: news.gmane.org!.POSTED.blaine.gmane.org!not-for-mail From: Andre McCurdy Newsgroups: gmane.linux.lib.musl.general Subject: [PATCH 1/2] Add Thumb2 support to ARM assembler memcpy Date: Fri, 13 Sep 2019 11:44:31 -0700 Message-ID: <20190913184432.29753-1-armccurdy@gmail.com> Reply-To: musl@lists.openwall.com Mime-Version: 1.0 Content-Transfer-Encoding: 8bit Injection-Info: blaine.gmane.org; posting-host="blaine.gmane.org:195.159.176.226"; logging-data="244916"; mail-complaints-to="usenet@blaine.gmane.org" Cc: Andre McCurdy To: musl@lists.openwall.com Original-X-From: musl-return-14686-gllmg-musl=m.gmane.org@lists.openwall.com Fri Sep 13 20:44:56 2019 Return-path: Envelope-to: gllmg-musl@m.gmane.org Original-Received: from mother.openwall.net ([195.42.179.200]) by blaine.gmane.org with smtp (Exim 4.89) (envelope-from ) id 1i8qYx-0011dE-AK for gllmg-musl@m.gmane.org; Fri, 13 Sep 2019 20:44:55 +0200 Original-Received: (qmail 30242 invoked by uid 550); 13 Sep 2019 18:44:52 -0000 Mailing-List: contact musl-help@lists.openwall.com; run by ezmlm Precedence: bulk List-Post: List-Help: List-Unsubscribe: List-Subscribe: List-ID: Original-Received: (qmail 30207 invoked from network); 13 Sep 2019 18:44:52 -0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=ZcjBYHmP+RiL64GtKzIlo5lwsRNzWvngwOqQk1tAjPg=; b=GCXjQqu/L54gpY8iKJ2vh4NBAWqOIY+DsOuBb6aAIa/mHp0HI3WJ3ORqS7eL1p4ds9 6+FmEI9Ij+q0j/qY4qoSMe5WlY+eEVGdK+cqteMr+aSWtJya6eWY+krhjh0eX3OfJYAZ 7BPQ2Mf/DgdJ8cbjyAEP3vBieByIEzTU4yHFeHPl4uAZsjG0tTzAp3SU+QemBmsqRaXy jV5T8Lfqt2Zfefh2D6kf/y0dFFjq3+S01bPYa/ac9oyTJ1Qhf+WHzWvZr3fnQZlp9Eeu QLDLk4/jeJxJQMMv42CjXBGWRGoIZ8Y8IBXNPsup7PST5Zl6d0p7VXgNAj139uwaddMv NFcg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=ZcjBYHmP+RiL64GtKzIlo5lwsRNzWvngwOqQk1tAjPg=; b=Oh8hs2GBQJBuSaGrnn4wwidihiKg+9/VLj3K0xp7V5dvnlXL8QiggYZR0Zwfjyxr32 33pLX16Wh6XO9StaVhRDwnDAkanJ5fyg+wtieY/nlEwH/6kvcc4frXxt7ZVZ1vyj4rl7 oQCQmw1dJZu4BVh4Zlb9fVOO+droZBOjne+4c4e28cEH3YDdiHxCb14xoJG68NkGgXWO zkRI3EmtY+n4W/pfdZ1G4HVQpSEccZ5ZQFqnvwIIJr0betbkDQu8kef2gpVfJnLfiFcU SHlTig70xj8IEajvkW24iiLsEuHwO4Ivtph293E3DA4sh+QqdsB9/vftIjSGEuWuDwZo nhUg== X-Gm-Message-State: APjAAAViBtPgPh/sJXWbDE2Hr+Xc3a86yJMhGX5gpeo0xb+5BGc5kobD 8Rc/DdnE43Ouq9az2U+8kIaCjTNE X-Google-Smtp-Source: APXvYqxS+xU4tri+g9m7E2ohblzQFobw3VhUv1ujXuK1xkbvNJw+J++cUo5uAr60ARdKblk2oSFO9g== X-Received: by 2002:a17:902:6945:: with SMTP id k5mr15553257plt.308.1568400279681; Fri, 13 Sep 2019 11:44:39 -0700 (PDT) X-Mailer: git-send-email 2.23.0 Xref: news.gmane.org gmane.linux.lib.musl.general:14670 Archived-At: For Thumb2 compatibility, replace two instances of a single instruction "orr with a variable shift" with the two instruction equivalent. Neither of the replacements are in a performance critical loop. --- src/string/arm/memcpy.c | 2 +- src/string/arm/memcpy_le.S | 17 ++++++++++------- 2 files changed, 11 insertions(+), 8 deletions(-) diff --git a/src/string/arm/memcpy.c b/src/string/arm/memcpy.c index f703c9bd..041614f4 100644 --- a/src/string/arm/memcpy.c +++ b/src/string/arm/memcpy.c @@ -1,3 +1,3 @@ -#if __ARMEB__ || __thumb__ +#if __ARMEB__ #include "../memcpy.c" #endif diff --git a/src/string/arm/memcpy_le.S b/src/string/arm/memcpy_le.S index 9cfbcb2a..64bc5f9e 100644 --- a/src/string/arm/memcpy_le.S +++ b/src/string/arm/memcpy_le.S @@ -1,4 +1,4 @@ -#if !__ARMEB__ && !__thumb__ +#if !__ARMEB__ /* * Copyright (C) 2008 The Android Open Source Project @@ -40,8 +40,9 @@ * This file has been modified from the original for use in musl libc. * The main changes are: addition of .type memcpy,%function to make the * code safely callable from thumb mode, adjusting the return - * instructions to be compatible with pre-thumb ARM cpus, and removal - * of prefetch code that is not compatible with older cpus. + * instructions to be compatible with pre-thumb ARM cpus, removal of + * prefetch code that is not compatible with older cpus and support for + * building as thumb 2. */ .syntax unified @@ -241,8 +242,9 @@ non_congruent: beq 2f ldr r5, [r1], #4 sub r2, r2, #4 - orr r4, r3, r5, lsl lr - mov r3, r5, lsr r12 + mov r4, r5, lsl lr + orr r4, r4, r3 + mov r3, r5, lsr r12 str r4, [r0], #4 cmp r2, #4 bhs 1b @@ -348,8 +350,9 @@ less_than_thirtytwo: 1: ldr r5, [r1], #4 sub r2, r2, #4 - orr r4, r3, r5, lsl lr - mov r3, r5, lsr r12 + mov r4, r5, lsl lr + orr r4, r4, r3 + mov r3, r5, lsr r12 str r4, [r0], #4 cmp r2, #4 bhs 1b -- 2.23.0