From mboxrd@z Thu Jan 1 00:00:00 1970 X-Msuck: nntp://news.gmane.org/gmane.linux.lib.musl.general/14980 Path: news.gmane.org!.POSTED.blaine.gmane.org!not-for-mail From: Rich Felker Newsgroups: gmane.linux.lib.musl.general Subject: Re: [PATCH] riscv64: fenv.S: Fix fesetenv(FE_DFL_ENV) failure Date: Sat, 7 Dec 2019 13:00:16 -0500 Message-ID: <20191207180016.GA1666@brightrain.aerifal.cx> References: <20191202110648.GA3068@APC301.andestech.com> Reply-To: musl@lists.openwall.com Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Injection-Info: blaine.gmane.org; posting-host="blaine.gmane.org:195.159.176.226"; logging-data="113530"; mail-complaints-to="usenet@blaine.gmane.org" User-Agent: Mutt/1.5.21 (2010-09-15) To: musl@lists.openwall.com Original-X-From: musl-return-14996-gllmg-musl=m.gmane.org@lists.openwall.com Sat Dec 07 19:00:34 2019 Return-path: Envelope-to: gllmg-musl@m.gmane.org Original-Received: from mother.openwall.net ([195.42.179.200]) by blaine.gmane.org with smtp (Exim 4.89) (envelope-from ) id 1ideNe-000TRS-3I for gllmg-musl@m.gmane.org; Sat, 07 Dec 2019 19:00:34 +0100 Original-Received: (qmail 24111 invoked by uid 550); 7 Dec 2019 18:00:29 -0000 Mailing-List: contact musl-help@lists.openwall.com; run by ezmlm Precedence: bulk List-Post: List-Help: List-Unsubscribe: List-Subscribe: List-ID: Original-Received: (qmail 24093 invoked from network); 7 Dec 2019 18:00:29 -0000 Content-Disposition: inline In-Reply-To: <20191202110648.GA3068@APC301.andestech.com> Original-Sender: Rich Felker Xref: news.gmane.org gmane.linux.lib.musl.general:14980 Archived-At: On Mon, Dec 02, 2019 at 07:06:52PM +0800, Ruinland ChuanTzu Tsai wrote: > Hi all, > during testing libc-test on RV64, > I happended to encounter a segfault on math/fenv.exe . > > When FE_DFL_ENV is passed to fesetenv(), > the very first instruction : lw t1, 0(a0) > will fail since a0 is -1 . > > Here's quick hack - - > > git diff -- src/fenv/riscv64/fenv.S > diff --git a/src/fenv/riscv64/fenv.S b/src/fenv/riscv64/fenv.S > index 97f74dd6..06215954 100644 > --- a/src/fenv/riscv64/fenv.S > +++ b/src/fenv/riscv64/fenv.S > @@ -45,8 +45,12 @@ fegetenv: > .global fesetenv > .type fesetenv, %function > fesetenv: > + li t2, -1 > + li t1, 0 > + beq a0, t2, setfpcsr > lw t1, 0(a0) > - fscsr t0, t1 > +setfpcsr: > + fscsr t1 > li a0, 0 > ret > > And the test case will pass. Looks mostly ok. Applying without the label name, 1f/1: instead. I was a bit confused by the removal of the t0 operand from fscsr but apparently the one-operand form implicitly uses the zero register as rd. Rich