From mboxrd@z Thu Jan 1 00:00:00 1970 X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on inbox.vuxu.org X-Spam-Level: X-Spam-Status: No, score=-3.3 required=5.0 tests=MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED,RCVD_IN_MSPIKE_H3,RCVD_IN_MSPIKE_WL,SPF_PASS autolearn=ham autolearn_force=no version=3.4.2 Received: (qmail 17555 invoked from network); 16 Apr 2020 17:59:46 -0000 Received-SPF: pass (mother.openwall.net: domain of lists.openwall.com designates 195.42.179.200 as permitted sender) receiver=inbox.vuxu.org; client-ip=195.42.179.200 envelope-from= Received: from mother.openwall.net (195.42.179.200) by inbox.vuxu.org with UTF8ESMTPZ; 16 Apr 2020 17:59:46 -0000 Received: (qmail 5232 invoked by uid 550); 16 Apr 2020 17:59:45 -0000 Mailing-List: contact musl-help@lists.openwall.com; run by ezmlm Precedence: bulk List-Post: List-Help: List-Unsubscribe: List-Subscribe: List-ID: Reply-To: musl@lists.openwall.com Received: (qmail 5213 invoked from network); 16 Apr 2020 17:59:44 -0000 Date: Thu, 16 Apr 2020 13:59:32 -0400 From: Rich Felker To: Adhemerval Zanella Cc: Nicholas Piggin , libc-alpha@sourceware.org, musl@lists.openwall.com, linuxppc-dev@lists.ozlabs.org, libc-dev@lists.llvm.org Message-ID: <20200416175932.GZ11469@brightrain.aerifal.cx> References: <1586931450.ub4c8cq8dj.astroid@bobo.none> <20200415225539.GL11469@brightrain.aerifal.cx> <20200416153756.GU11469@brightrain.aerifal.cx> <4b2a7a56-dd2b-1863-50e5-2f4cdbeef47c@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <4b2a7a56-dd2b-1863-50e5-2f4cdbeef47c@linaro.org> User-Agent: Mutt/1.5.21 (2010-09-15) Subject: Re: [musl] Powerpc Linux 'scv' system call ABI proposal take 2 On Thu, Apr 16, 2020 at 02:50:18PM -0300, Adhemerval Zanella wrote: > > > On 16/04/2020 12:37, Rich Felker wrote: > > On Thu, Apr 16, 2020 at 11:16:04AM -0300, Adhemerval Zanella wrote: > >>> My preference would be that it work just like the i386 AT_SYSINFO > >>> where you just replace "int $128" with "call *%%gs:16" and the kernel > >>> provides a stub in the vdso that performs either scv or the old > >>> mechanism with the same calling convention. Then if the kernel doesn't > >>> provide it (because the kernel is too old) libc would have to provide > >>> its own stub that uses the legacy method and matches the calling > >>> convention of the one the kernel is expected to provide. > >> > >> What about pthread cancellation and the requirement of checking the > >> cancellable syscall anchors in asynchronous cancellation? My plan is > >> still to use musl strategy on glibc (BZ#12683) and for i686 it > >> requires to always use old int$128 for program that uses cancellation > >> (static case) or just threads (dynamic mode, which should be more > >> common on glibc). > >> > >> Using the i686 strategy of a vDSO bridge symbol would require to always > >> fallback to 'sc' to still use the same cancellation strategy (and > >> thus defeating this optimization in such cases). > > > > Yes, I assumed it would be the same, ignoring the new syscall > > mechanism for cancellable syscalls. While there are some exceptions, > > cancellable syscalls are generally not hot paths but things that are > > expected to block and to have significant amounts of work to do in > > kernelspace, so saving a few tens of cycles is rather pointless. > > > > It's possible to do a branch/multiple versions of the syscall asm for > > cancellation but would require extending the cancellation handler to > > support checking against multiple independent address ranges or using > > some alternate markup of them. > > The main issue is at least for glibc dynamic linking is way more common > than static linking and once the program become multithread the fallback > will be always used. I'm not relying on static linking optimizing out the cancellable version. I'm talking about how cancellable syscalls are pretty much all "heavy" operations to begin with where a few tens of cycles are in the realm of "measurement noise" relative to the dominating time costs. > And besides the cancellation performance issue, a new bridge vDSO mechanism > will still require to setup some extra bridge for the case of the older > kernel. In the scheme you suggested: > > __asm__("indirect call" ... with common clobbers); > > The indirect call will be either the vDSO bridge or an libc provided that > fallback to 'sc' for !PPC_FEATURE2_SCV. I am not this is really a gain > against: > > if (hwcap & PPC_FEATURE2_SCV) { > __asm__(... with some clobbers); > } else { > __asm__(... with different clobbers); > } If the indirect call can be made roughly as efficiently as the sc sequence now (which already have some cost due to handling the nasty error return convention, making the indirect call likely just as small or smaller), it's O(1) additional code size (and thus icache usage) rather than O(n) where n is number of syscall points. Of course it would work just as well (for avoiding O(n) growth) to have a direct call to out-of-line branch like you suggested. > Specially if 'hwcap & PPC_FEATURE2_SCV' could be optimized with a > TCB member (as we do on glibc) and if we could make the asm clever > enough to not require different clobbers (although not sure if > it would be possible). The easy way not to require different clobbers is just using the union of the clobbers, no? Does the proposed new method clobber any call-saved registers that would make it painful (requiring new call frames to save them in)? Rich