From mboxrd@z Thu Jan 1 00:00:00 1970 X-Spam-Checker-Version: SpamAssassin 3.4.4 (2020-01-24) on inbox.vuxu.org X-Spam-Level: X-Spam-Status: No, score=-3.3 required=5.0 tests=MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED,RCVD_IN_MSPIKE_H3,RCVD_IN_MSPIKE_WL autolearn=ham autolearn_force=no version=3.4.4 Received: (qmail 11929 invoked from network); 7 Jul 2020 18:20:59 -0000 Received: from mother.openwall.net (195.42.179.200) by inbox.vuxu.org with ESMTPUTF8; 7 Jul 2020 18:20:59 -0000 Received: (qmail 11761 invoked by uid 550); 7 Jul 2020 18:20:57 -0000 Mailing-List: contact musl-help@lists.openwall.com; run by ezmlm Precedence: bulk List-Post: List-Help: List-Unsubscribe: List-Subscribe: List-ID: Reply-To: musl@lists.openwall.com Received: (qmail 11743 invoked from network); 7 Jul 2020 18:20:56 -0000 Date: Tue, 7 Jul 2020 20:20:44 +0200 From: Szabolcs Nagy To: Rich Felker Cc: musl@lists.openwall.com Message-ID: <20200707182044.GK2048759@port70.net> Mail-Followup-To: Rich Felker , musl@lists.openwall.com References: <20200625081504.GE2048759@port70.net> <20200625153936.GP6430@brightrain.aerifal.cx> <20200625173125.GF2048759@port70.net> <20200625205024.GR6430@brightrain.aerifal.cx> <20200625211536.GS6430@brightrain.aerifal.cx> <20200626012003.GX6430@brightrain.aerifal.cx> <20200626084049.GG2048759@port70.net> <20200706221242.GM6430@brightrain.aerifal.cx> <20200707150020.GJ2048759@port70.net> <20200707172257.GO6430@brightrain.aerifal.cx> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20200707172257.GO6430@brightrain.aerifal.cx> Subject: Re: [musl] Release prep for 1.2.1, and afterwards * Rich Felker [2020-07-07 13:22:57 -0400]: > On Tue, Jul 07, 2020 at 05:00:20PM +0200, Szabolcs Nagy wrote: > > * Rich Felker [2020-07-06 18:12:43 -0400]: > > > I think you saw already, but just to make it clear on the list too, > > > it's upstream now. I'm open to further improvements like doing > > > memmove (either as a separate copy of the full implementation or some > > > minimal branch-to-__memcpy_fwd approach) but I think what's already > > > there is sufficient to solve the main practical performance issues > > > users were hitting that made aarch64 look bad in relation to x86_64. > > > > > > I'd still like to revisit the topic of minimizing the per-arch code > > > needed for this so that all archs can benefit from the basic logic, > > > too. > > > > thanks. > > > > note that the code has some internal .p2align > > directives that assume the entry is aligned to > > some large alignment (.p2align 6 in orig code) > > > > i think it would be better to keep the entry > > aligned (but i don't know if it makes a big > > difference on some existing core, it's more > > for consistency with upstream). > > > > musl normally does not align function entries > > but for a few select functions it is probably > > not too much overhead? > > I was under the impression that any .p2align N in the section > inherently aligns the whole section as if it started with .p2align N, > in which case not writing it explicitly just avoids redundancy and > makes sure you don't actually have an initial alignment that's larger > than any alignment actually wanted later. Is this incorrect? > > (To be incorrect I think it would have to do some fancy > elastic-section-contents hack, but maybe aarch64 ELF object ABI has > that..?) ah you are right, then everything is fine i guess.