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* [musl] [Question] about arch/riscv64/crt_arch.h
@ 2020-10-28  1:40 Chen Wang
  2020-10-28  1:48 ` Patrick Oppenlander
  0 siblings, 1 reply; 3+ messages in thread
From: Chen Wang @ 2020-10-28  1:40 UTC (permalink / raw)
  To: musl; +Cc: unicorn_wang

[-- Attachment #1: Type: text/plain, Size: 209 bytes --]

hi,
I'm reading musl (1.2.1) code for riscv. In arch/riscv64/crt_arch.h,

__asm__(
......
"andi sp, sp, -16\n\t" // <--- why do we need this?
"tail " START "_c"
);





Best Regards

Wang Chen

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^ permalink raw reply	[flat|nested] 3+ messages in thread

* Re: [musl] [Question] about arch/riscv64/crt_arch.h
  2020-10-28  1:40 [musl] [Question] about arch/riscv64/crt_arch.h Chen Wang
@ 2020-10-28  1:48 ` Patrick Oppenlander
  2020-10-28  1:50   ` Rich Felker
  0 siblings, 1 reply; 3+ messages in thread
From: Patrick Oppenlander @ 2020-10-28  1:48 UTC (permalink / raw)
  To: musl; +Cc: unicorn_wang

On Wed, Oct 28, 2020 at 12:40 PM Chen Wang <unicorn_wang@outlook.com> wrote:
>
> hi,
> I'm reading musl (1.2.1) code for riscv. In arch/riscv64/crt_arch.h,
>
> __asm__(
> ......
> "andi sp, sp, -16\n\t" // <--- why do we need this?
> "tail " START "_c"
> );
>

I'm not familiar with RISC-V, but it's there to guarantee that the
stack is 16-byte aligned which must be either an architectural or ABI
requirement.

Perhaps the kernel can start the process with a more relaxed stack
alignment. Otherwise it's there for safety (paranoia).

Patrick

^ permalink raw reply	[flat|nested] 3+ messages in thread

* Re: [musl] [Question] about arch/riscv64/crt_arch.h
  2020-10-28  1:48 ` Patrick Oppenlander
@ 2020-10-28  1:50   ` Rich Felker
  0 siblings, 0 replies; 3+ messages in thread
From: Rich Felker @ 2020-10-28  1:50 UTC (permalink / raw)
  To: Patrick Oppenlander; +Cc: musl, unicorn_wang

On Wed, Oct 28, 2020 at 12:48:02PM +1100, Patrick Oppenlander wrote:
> On Wed, Oct 28, 2020 at 12:40 PM Chen Wang <unicorn_wang@outlook.com> wrote:
> >
> > hi,
> > I'm reading musl (1.2.1) code for riscv. In arch/riscv64/crt_arch.h,
> >
> > __asm__(
> > ......
> > "andi sp, sp, -16\n\t" // <--- why do we need this?
> > "tail " START "_c"
> > );
> >
> 
> I'm not familiar with RISC-V, but it's there to guarantee that the
> stack is 16-byte aligned which must be either an architectural or ABI
> requirement.
> 
> Perhaps the kernel can start the process with a more relaxed stack
> alignment. Otherwise it's there for safety (paranoia).

Regardless of whether the kernel can, the dynamic linker can, because
it peels off a possibly odd number of 8-byte arguments when executed
as a command:

	/lib/ld-musl-riscv64.so.1 [options] your_program [args]

The ELF entry point contract is just that SP point to the argument
vector, not that it be a valid stack pointer for entering a C
function. So the entry point has to align the stack before
transferring control to C.

Rich

^ permalink raw reply	[flat|nested] 3+ messages in thread

end of thread, other threads:[~2020-10-28  1:51 UTC | newest]

Thread overview: 3+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2020-10-28  1:40 [musl] [Question] about arch/riscv64/crt_arch.h Chen Wang
2020-10-28  1:48 ` Patrick Oppenlander
2020-10-28  1:50   ` Rich Felker

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