From mboxrd@z Thu Jan 1 00:00:00 1970 X-Spam-Checker-Version: SpamAssassin 3.4.4 (2020-01-24) on inbox.vuxu.org X-Spam-Level: X-Spam-Status: No, score=-1.6 required=5.0 tests=MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED,RCVD_IN_MSPIKE_H3,RCVD_IN_MSPIKE_WL,URIBL_BLACK autolearn=ham autolearn_force=no version=3.4.4 Received: (qmail 31433 invoked from network); 21 Apr 2021 08:25:16 -0000 Received: from mother.openwall.net (195.42.179.200) by inbox.vuxu.org with ESMTPUTF8; 21 Apr 2021 08:25:16 -0000 Received: (qmail 1072 invoked by uid 550); 21 Apr 2021 08:25:11 -0000 Mailing-List: contact musl-help@lists.openwall.com; run by ezmlm Precedence: bulk List-Post: List-Help: List-Unsubscribe: List-Subscribe: List-ID: Reply-To: musl@lists.openwall.com Received: (qmail 1049 invoked from network); 21 Apr 2021 08:25:11 -0000 Date: Wed, 21 Apr 2021 10:24:58 +0200 From: Szabolcs Nagy To: =?utf-8?B?w4lyaWNv?= Nogueira Cc: musl@lists.openwall.com Message-ID: <20210421082458.GI2799122@port70.net> Mail-Followup-To: =?utf-8?B?w4lyaWNv?= Nogueira , musl@lists.openwall.com References: <20210420191519.23822-1-ericonr@disroot.org> <20210420191519.23822-5-ericonr@disroot.org> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: quoted-printable In-Reply-To: <20210420191519.23822-5-ericonr@disroot.org> Subject: Re: [musl] [PATCH] shorten __aeabi_memset by one instruction * =C3=89rico Nogueira [2021-04-20 16:15:19 -0300]: > when building for armhf, this makes libc.so text smaller by 4 bytes: > 606619 to 606615 > --- > src/string/arm/__aeabi_memset.s | 3 +-- > 1 file changed, 1 insertion(+), 2 deletions(-) >=20 > diff --git a/src/string/arm/__aeabi_memset.s b/src/string/arm/__aeabi_mem= set.s > index f9f60583..980774e8 100644 > --- a/src/string/arm/__aeabi_memset.s > +++ b/src/string/arm/__aeabi_memset.s > @@ -24,8 +24,7 @@ __aeabi_memset: > cmp r1, #0 > beq 2f > adds r1, r0, r1 > -1: strb r2, [r0] > - adds r0, r0, #1 > +1: strb r2, [r0], #1 this is not available before armv7 as thumb instruction (and it has 32bit thumb encoding, so you replace two 16bit instructions with a 32bit one.) normally this asm is compiled in arm mode even if your toolchain defaults to thumb (i'm not sure why), but if you select a cpu or arch that only supports thumb then the assembler will try to use thumb and fail e.g. on -march=3Darmv6-m (but i'm not sure if musl supports that compilation mode throughout) > cmp r1, r0 > bne 1b > 2: bx lr > --=20 > 2.31.1