From mboxrd@z Thu Jan 1 00:00:00 1970 X-Spam-Checker-Version: SpamAssassin 3.4.4 (2020-01-24) on inbox.vuxu.org X-Spam-Level: X-Spam-Status: No, score=-3.3 required=5.0 tests=MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED,RCVD_IN_MSPIKE_H3,RCVD_IN_MSPIKE_WL autolearn=ham autolearn_force=no version=3.4.4 Received: (qmail 5490 invoked from network); 18 Oct 2021 20:42:20 -0000 Received: from mother.openwall.net (195.42.179.200) by inbox.vuxu.org with ESMTPUTF8; 18 Oct 2021 20:42:20 -0000 Received: (qmail 12265 invoked by uid 550); 18 Oct 2021 20:42:17 -0000 Mailing-List: contact musl-help@lists.openwall.com; run by ezmlm Precedence: bulk List-Post: List-Help: List-Unsubscribe: List-Subscribe: List-ID: Reply-To: musl@lists.openwall.com Received: (qmail 12230 invoked from network); 18 Oct 2021 20:42:17 -0000 Date: Mon, 18 Oct 2021 16:42:04 -0400 From: Rich Felker To: Arnd Bergmann Cc: musl@lists.openwall.com, Takashi Iwai , Michael Forney , ALSA Development Mailing List , Takashi Iwai , Baolin Wang , y2038 Mailman List , Linux Kernel Mailing List , Mark Brown , Baolin Wang Message-ID: <20211018204203.GM7074@brightrain.aerifal.cx> References: <20211007165158.GC7074@brightrain.aerifal.cx> <20211008120736.GF7074@brightrain.aerifal.cx> <20211018144259.GK7074@brightrain.aerifal.cx> <20211018150824.GL7074@brightrain.aerifal.cx> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.5.21 (2010-09-15) Subject: Re: [musl] Re: [alsa-devel] [PATCH v7 8/9] ALSA: add new 32-bit layout for snd_pcm_mmap_status/control On Mon, Oct 18, 2021 at 05:26:35PM +0200, Arnd Bergmann wrote: > On Mon, Oct 18, 2021 at 5:08 PM Rich Felker wrote: > > On Mon, Oct 18, 2021 at 04:58:03PM +0200, Takashi Iwai wrote: > > > On Mon, 18 Oct 2021 16:43:00 +0200, Rich Felker wrote: > > > > No, I don't think so. The musl translator is to translate between the > > time64 ioctl structures and the old time32 ones for the sake of > > executing on an old kernel. Up til now, it has been broken comparably > > to how 32-bit binaries running in compat mode on a 64-bit kernel were > > broken: the code in musl translated the time64 structure to (and back > > from) the time32 one assuming the intended padding. But the > > application was using the actual kernel uapi struct where the padding > > was (and still is) illogical. Thus, nothing was built with the wrong > > ABI; it's only the musl-internal translation logic that was wrong (and > > only pre-time64 kernels are affected). > > > > The attached patch should fix it, I think. > > > > + int adj = BYTE_ORDER==BIG_ENDIAN ? 4 : 0; > > + if (dir==W) { > > + memcpy(old+68, new+72+adj, 4); > > + memcpy(old+72, new+72+4+2*adj, 4); > > I think that should be "new+72+4+3*adj": the "2*adj" would > be what the code does already for the originally intended > format. Well for little endian either would work (because adj is 0 :) but yes there are 3 such paddings before the second member on big endian, so it should be 3. Rich