From mboxrd@z Thu Jan 1 00:00:00 1970 X-Spam-Checker-Version: SpamAssassin 3.4.4 (2020-01-24) on inbox.vuxu.org X-Spam-Level: X-Spam-Status: No, score=-3.3 required=5.0 tests=MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED,RCVD_IN_MSPIKE_H3,RCVD_IN_MSPIKE_WL autolearn=ham autolearn_force=no version=3.4.4 Received: (qmail 29578 invoked from network); 19 Oct 2021 14:16:41 -0000 Received: from mother.openwall.net (195.42.179.200) by inbox.vuxu.org with ESMTPUTF8; 19 Oct 2021 14:16:41 -0000 Received: (qmail 13659 invoked by uid 550); 19 Oct 2021 14:16:38 -0000 Mailing-List: contact musl-help@lists.openwall.com; run by ezmlm Precedence: bulk List-Post: List-Help: List-Unsubscribe: List-Subscribe: List-ID: Reply-To: musl@lists.openwall.com Received: (qmail 13621 invoked from network); 19 Oct 2021 14:16:37 -0000 Date: Tue, 19 Oct 2021 10:16:24 -0400 From: Rich Felker To: Arnd Bergmann Cc: musl@lists.openwall.com, Takashi Iwai , Michael Forney , ALSA Development Mailing List , Takashi Iwai , Baolin Wang , y2038 Mailman List , Linux Kernel Mailing List , Mark Brown , Baolin Wang Message-ID: <20211019141622.GN7074@brightrain.aerifal.cx> References: <20211008120736.GF7074@brightrain.aerifal.cx> <20211018144259.GK7074@brightrain.aerifal.cx> <20211018150824.GL7074@brightrain.aerifal.cx> <20211018204203.GM7074@brightrain.aerifal.cx> MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="0ntfKIWw70PvrIHh" Content-Disposition: inline In-Reply-To: <20211018204203.GM7074@brightrain.aerifal.cx> User-Agent: Mutt/1.5.21 (2010-09-15) Subject: Re: [musl] Re: [alsa-devel] [PATCH v7 8/9] ALSA: add new 32-bit layout for snd_pcm_mmap_status/control --0ntfKIWw70PvrIHh Content-Type: text/plain; charset=us-ascii Content-Disposition: inline On Mon, Oct 18, 2021 at 04:42:04PM -0400, Rich Felker wrote: > On Mon, Oct 18, 2021 at 05:26:35PM +0200, Arnd Bergmann wrote: > > On Mon, Oct 18, 2021 at 5:08 PM Rich Felker wrote: > > > On Mon, Oct 18, 2021 at 04:58:03PM +0200, Takashi Iwai wrote: > > > > On Mon, 18 Oct 2021 16:43:00 +0200, Rich Felker wrote: > > > > > > No, I don't think so. The musl translator is to translate between the > > > time64 ioctl structures and the old time32 ones for the sake of > > > executing on an old kernel. Up til now, it has been broken comparably > > > to how 32-bit binaries running in compat mode on a 64-bit kernel were > > > broken: the code in musl translated the time64 structure to (and back > > > from) the time32 one assuming the intended padding. But the > > > application was using the actual kernel uapi struct where the padding > > > was (and still is) illogical. Thus, nothing was built with the wrong > > > ABI; it's only the musl-internal translation logic that was wrong (and > > > only pre-time64 kernels are affected). > > > > > > The attached patch should fix it, I think. > > > > > > + int adj = BYTE_ORDER==BIG_ENDIAN ? 4 : 0; > > > + if (dir==W) { > > > + memcpy(old+68, new+72+adj, 4); > > > + memcpy(old+72, new+72+4+2*adj, 4); > > > > I think that should be "new+72+4+3*adj": the "2*adj" would > > be what the code does already for the originally intended > > format. > > Well for little endian either would work (because adj is 0 :) but yes > there are 3 such paddings before the second member on big endian, so > it should be 3. How about this? It avoids open coding the logic and handles it as 2 4-byte substructures with endian-specific offsets. Rich --0ntfKIWw70PvrIHh Content-Type: text/plain; charset=us-ascii Content-Disposition: attachment; filename="snd_pcm_mmap_control_v2.diff" diff --git a/src/misc/ioctl.c b/src/misc/ioctl.c index 49282811..35804f02 100644 --- a/src/misc/ioctl.c +++ b/src/misc/ioctl.c @@ -6,6 +6,7 @@ #include #include #include +#include #include "syscall.h" #define alignof(t) offsetof(struct { char c; t x; }, x) @@ -53,7 +54,7 @@ static const struct ioctl_compat_map compat_map[] = { { _IOWR('A', 0x23, char[136]), _IOWR('A', 0x23, char[132]), 0, WR, 1, 0 }, { 0, 0, 4, WR, 1, 0 }, /* snd_pcm_sync_ptr (flags only) */ { 0, 0, 32, WR, 1, OFFS(8,12,16,24,28) }, /* snd_pcm_mmap_status */ - { 0, 0, 8, WR, 1, OFFS(0,4) }, /* snd_pcm_mmap_control */ + { 0, 0, 4, WR, 1, 0 }, /* snd_pcm_mmap_control (each member) */ /* VIDIOC_QUERYBUF, VIDIOC_QBUF, VIDIOC_DQBUF, VIDIOC_PREPARE_BUF */ { _IOWR('V', 9, new_misaligned(68)), _IOWR('V', 9, char[68]), 68, WR, 1, OFFS(20, 24) }, @@ -90,7 +91,11 @@ static void convert_ioctl_struct(const struct ioctl_compat_map *map, char *old, * if another exception appears this needs changing. */ convert_ioctl_struct(map+1, old, new, dir); convert_ioctl_struct(map+2, old+4, new+8, dir); - convert_ioctl_struct(map+3, old+68, new+72, dir); + /* snd_pcm_mmap_control, special-cased due to kernel + * type definition having been botched. */ + int adj = BYTE_ORDER==BIG_ENDIAN ? 4 : 0; + convert_ioctl_struct(map+3, old+68, new+72+adj, dir); + convert_ioctl_struct(map+3, old+72, new+76+3*adj, dir); return; } for (int i=0; i < map->noffs; i++) { --0ntfKIWw70PvrIHh--